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公开(公告)号：US20160327838A1
公开(公告)日：2016-11-10
申请号：US14905738
申请日：2015-04-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan Li , Wenbo Li , Yong Qiao , Hongfei Cheng , Jianbo Xian
IPC: G02F1/1343 , H01L27/12 , H01L29/423 , G02F1/1362
CPC classification number: G02F1/134336 , G02F1/133707 , G02F1/13439 , G02F1/1362 , G02F1/136286 , G02F2001/134345 , G02F2001/136218 , G02F2201/123 , G02F2201/124 , H01L23/60 , H01L27/124 , H01L29/42384 , H01L2924/0002 , H01L2924/00
Abstract: The present invention discloses an array substrate, a display panel, and a display device, for solving a problem of tip discharge a comb pixel electrode comprised in a sub-pixel unit in the prior art, which produces discharge to surrounding data lines, gate lines, and neighboring pixel electrodes, so that neighboring sub-pixel units are subject to interference and display effect is influenced. The array substrate comprises a base plate, the base plate is further provided with a plurality of sub-pixel units, each of the sub-pixel units comprises a pixel electrode of a comb structure, and the base plate is further provided with a shielding electrode which is electrically connected with the pixel electrode.
Abstract translation: 本发明公开了一种阵列基板，显示面板和显示装置，用于解决现有技术中包括在子像素单元中的梳状像素电极的尖端放电的问题，其产生对周围数据线的放电，栅极线 和相邻的像素电极，使得相邻的子像素单元受到干扰并且影响显示效果。 阵列基板包括基板，基板还设置有多个子像素单元，每个子像素单元包括梳状结构的像素电极，并且基板还设置有屏蔽电极 其与像素电极电连接。
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公开(公告)号：US09466812B2
公开(公告)日：2016-10-11
申请号：US14428794
申请日：2014-07-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei Cheng , Yuxin Zhang
IPC: H01L51/52
CPC classification number: H01L51/5256 , H01L51/5246 , H01L51/5253 , H01L2251/301 , H01L2251/303 , H01L2251/558
Abstract: The present invention provides an organic electroluminescent device packaging structure, comprising a first substrate, a second substrate and an organic electroluminescent device, the organic electroluminescent device being arranged on the first substrate, and the second substrate and the first substrate being spaced apart to arrange the organic electroluminescent device in a sealed space between the first substrate and the second substrate, wherein the organic electroluminescent device packaging structure further comprises a first barrier layer and filling oil filled in the sealed space, and the first barrier layer covers the outer surface of the organic electroluminescent device.
Abstract translation: 本发明提供一种有机电致发光器件封装结构，包括第一衬底，第二衬底和有机电致发光器件，所述有机电致发光器件布置在第一衬底上，并且第二衬底和第一衬底间隔开以布置 有机电致发光器件在第一衬底和第二衬底之间的密封空间中，其中有机电致发光器件封装结构还包括填充在密封空间中的第一阻挡层和填充油，并且第一阻挡层覆盖有机电致发光器件的外表面 电致发光器件。
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公开(公告)号：US20150364500A1
公开(公告)日：2015-12-17
申请号：US14482686
申请日：2014-09-10
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei Cheng , Yong Qiao , Jianbo Xian , Wenbo Li , Pan Li
IPC: H01L27/12
CPC classification number: H01L27/1222 , H01L27/124
Abstract: An array substrate and a display device is disclosed, for eliminating the interference of transient electromagnetic signals caused by the time-varying voltages on the gate lines and the data lines with the voltages on the pixel electrodes. The array substrate comprises gate lines and data lines disposed on a substrate, and pixel units surrounded and separated by the gate lines and the data lines; and the array substrate further comprises shielding electrodes disposed above at least one of the gate lines and the data lines to cover at least part of the at least one and electrically insulated from the gate lines and the data lines.
Abstract translation: 公开了阵列基板和显示装置，用于消除由栅极线和数据线上的时变电压引起的瞬时电磁信号与像素电极上的电压的干扰。 阵列基板包括设置在基板上的栅极线和数据线，以及由栅极线和数据线包围和分离的像素单元; 并且阵列基板还包括设置在至少一个栅极线和数据线之上的屏蔽电极，以覆盖至少一个并且与栅极线和数据线电绝缘的至少一部分。
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公开(公告)号：US12013618B2
公开(公告)日：2024-06-18
申请号：US17954646
申请日：2022-09-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jianbo Xian , Hongfei Cheng , Jian Xu , Yong Qiao
IPC: G02F1/1362 , G02F1/03 , G02F1/155 , G02F1/1335 , G02F1/1339 , G02F1/1343 , G02F1/1368
CPC classification number: G02F1/136286 , G02F1/0316 , G02F1/136218 , G02F1/155 , G02F1/133512 , G02F1/133514 , G02F1/13394 , G02F1/134336 , G02F1/136204 , G02F1/136209 , G02F1/136222 , G02F1/1368 , G02F2201/40
Abstract: An array substrate (10) and a display device (16) are provided, and the array substrate includes a base substrate (1) and includes a pixel array (1) and an auxiliary conductive structure (3) which are on the base substrate (1); the pixel array includes a plurality of pixel units (2) arranged in an array and a plurality of pixel electrodes (21), and each of the plurality of pixel units (2) includes at least one of the plurality of pixel electrodes (21); the auxiliary conductive structure (3) surrounds at least one of the plurality of pixel electrodes (21) and is insulated from the plurality of pixel electrodes (21); a resistivity of a material of the auxiliary conductive structure (3) is less than or equal to a resistivity of a material of the at least one of the plurality of the pixel electrodes (21). The auxiliary conductive structure (3) receives and transmits interfering charges around the pixel electrode (21), so that the interfering charges are kept away from the pixel electrode (21), and thereby interference of the interfering charges on the pixel electrode (21) is prevented or reduced.
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公开(公告)号：US12002422B2
公开(公告)日：2024-06-04
申请号：US17293086
申请日：2020-09-14
Inventor： Hongfei Cheng , Xueguang Hao , Hui Li , Chen Xu , Pan Li
IPC: G09G3/3233 , G09G3/3266 , H10K59/121 , H10K59/123 , H10K59/131 , H01L27/12
CPC classification number: G09G3/3233 , G09G3/3266 , H10K59/1213 , H10K59/123 , H10K59/131 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/0202 , G09G2310/0286 , H01L27/124
Abstract: A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels, a first power line and an electrical connection layer on the base substrate. Each sub-pixel includes a pixel circuit, and a plurality of sub-pixels are arranged in a plurality of rows and a plurality of columns along a first direction and a second direction. The sub-pixel is electrically connected with the light-emitting element through the electrical connection layer, and the portion, which is in the display region of the display substrate, of the electrical connection layer is not overlapped with the first power line in a direction perpendicular to the base substrate.
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Patent Agency Ranking
公开(公告)号：US11822196B2
公开(公告)日：2023-11-21
申请号：US16966592
申请日：2019-07-25
Inventor： Hongfei Cheng , Pan Li
IPC: G02F1/1362 , G02F1/1333 , G02F1/1343
CPC classification number: G02F1/136286 , G02F1/13338 , G02F1/134309
Abstract: An array substrate includes at least one driving electrode region and at least one sensing electrode region which are alternately arranged along a row direction and are disconnected from each other, each driving electrode region and each sensing electrode region include one first common electrode and one second common electrode respectively, at least one driving electrode line continuously passes through the driving electrode region and the sensing electrode region alternately arranged along the row direction. The first common electrode in the driving electrode region is connected to the driving electrode line through at least one first through hole, the second common electrode in the sensing electrode region is disconnected from the driving electrode line.
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公开(公告)号：US11699761B2
公开(公告)日：2023-07-11
申请号：US17417514
申请日：2020-11-05
Inventor： Hongfei Cheng
IPC: H01L29/786 , H01L29/417 , H01L29/66
CPC classification number: H01L29/78672 , H01L29/41733 , H01L29/6675 , H01L29/78663
Abstract: The present disclosure provides a thin film transistor and a fabrication method thereof, an array substrate and a fabrication method thereof, and a display panel. The method for fabricating a thin film transistor includes: forming an active layer including a first region, a second region and a third region on a substrate; forming a gate insulating layer on a side of the active layer away from the substrate; forming a gate electrode on a side of the gate insulating layer away from the active layer; and ion-implanting the active layer from a side of the gate electrode away from the active layer, so that the first region is formed into a heavily doped region, the second region is formed into a lightly doped region, and the third region is formed into an active region.
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公开(公告)号：US11538381B2
公开(公告)日：2022-12-27
申请号：US17213261
申请日：2021-03-26
Inventor： Hongfei Cheng
IPC: G09G3/20
Abstract: Provided are a gate drive unit, a gate drive circuit, a drive method and a display apparatus. The gate drive unit includes an input control module, an input module, a potential pull-down module, a first output module, a second output module, an isolation module, a first node and a second node, wherein the input control module controls operation of the input module under action of a second input signal and a first clock signal; the input module transmits a second clock signal to the second node under control of the input control module; the potential pull-down module pulls down a potential of the second node under action of a potential of the first node; the first output module outputs a first output signal under action of the potential of the first node, the potential of the second node and the first clock signal.
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公开(公告)号：US11430841B2
公开(公告)日：2022-08-30
申请号：US16330694
申请日：2018-08-08
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongfei Cheng , Yong Qiao , Xinyin Wu
Abstract: The present disclosure provides an array substrate and a display device. The array substrate comprises a plurality of pixel units arranged in an array, each pixel unit including a light emitting unit and a pixel definition layer disposed around the light emitting unit; wherein in at least one pixel unit, a light wave partition groove is provided in the pixel definition layer on at least one side of the light emitting unit, and a light wave blocking layer is provided in the light wave partition groove.
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140.发明授权公开(公告)号：US11374131B2
公开(公告)日：2022-06-28
申请号：US16635140
申请日：2019-08-01
Inventor： Hongfei Cheng , Chen Xu
IPC: H01L29/786 , H01L27/12 , H01L29/45 , H01L29/66
Abstract: A thin film transistor, an array substrate, a display device and a method for manufacturing a thin film transistor are provided. The thin film transistor is formed on a base substrate and includes a source; a drain; and a semiconductor active layer having an amorphous silicon layer and one polysilicon portion or a plurality of polysilicon portions, the amorphous silicon layer being contacted with the one polysilicon portion or the plurality of polysilicon portions. The method includes a process of forming a source, a drain, and a semiconductor active layer: wherein forming a semiconductor active layer comprises: forming a first amorphous silicon thin film on a base substrate; and performing a crystallization treatment to the first amorphous silicon thin film to convert a part of the amorphous silicon in the first amorphous silicon thin film into polysilicon, such that a semiconductor active layer comprising one polysilicon portion or a plurality of polysilicon portions are formed.
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