Technique for independent ground fault detection of multiple twisted pair telephone lines connected to a common electrical power source
    131.
    发明申请
    Technique for independent ground fault detection of multiple twisted pair telephone lines connected to a common electrical power source 有权
    用于连接到公共电源的多个双绞线电话线的独立接地故障检测技术

    公开(公告)号:US20050163308A1

    公开(公告)日:2005-07-28

    申请号:US10760996

    申请日:2004-01-20

    CPC classification number: H04M3/306

    Abstract: A method and apparatus detects a ground fault on a span-powered telecommunication wireline within a plurality of span-powered wireline segments, to respective ones of which DSL-Cs are coupled, so that a ground fault may be detected when power is delivered by the DSL-C over a respective wireline segment to a respective downstream functional RT. A respective DSL-C measures a first voltage across a first sense resistor representative of current flowing in a first portion of its wireline segment to the RT, and also measures a second voltage across a second sense resistor representative of current flowing in a second portion of the wireline segment from the RT. In response to a difference in the first and second voltages an output representative of a ground fault in that wireline segment is generated.

    Abstract translation: 一种方法和装置检测多个跨度供电的有线线路段内的跨接电力电信线路上的接地故障,其中DSL-Cs耦合到相应的DSL-Cs,从而当功率由 DSL-C通过相应的有线线路段到相应的下游功能RT。 相应的DSL-C测量表示在其有线线段的第一部分中流动到RT的电流的第一感测电阻器上的第一电压,并且还测量表示在第二部分中流动的电流的第二检测电阻器 来自RT的有线线段。 响应于第一和第二电压的差异,产生代表该有线线段中的接地故障的输出。

    Systems for preparing presentation instruments for distribution
    132.
    发明申请
    Systems for preparing presentation instruments for distribution 有权
    准备演示文稿分发系统

    公开(公告)号:US20050150942A1

    公开(公告)日:2005-07-14

    申请号:US10985662

    申请日:2004-11-09

    Abstract: A system for processing presentation instruments that includes a presentation instrument reservoir, a presentation instrument reader, a distribution stock holder, a distribution stock reader, two or more motor systems for advancing distribution stock and presentation instruments, and attaching the presentation instruments to the distribution stock when codes printed on the instruments and stock match each other. In some cases, the motor systems can interface to an interface controller via a serial interface, and the interface controller can be coupled to a process control computer via an Ethernet connection. In some cases, distribution stock is blank and has no readable code, in which case the blank stock is automatically advanced to a reject bin without interrupting the operation of system.

    Abstract translation: 一种用于处理演示文稿的系统,包括演示文稿储存器,演示文书读取器,分发存货,分发纸阅读器,用于推进分发存货和呈现工具的两个或更多个电机系统,以及将展示工具附接到配送库存 当打印在仪器和库存上的代码相互匹配时。 在某些情况下,电机系统可以通过串行接口连接到接口控制器,并且接口控制器可以通过以太网连接耦合到过程控制计算机。 在某些情况下,配送库存为空白且无可读代码,在这种情况下,空白库存将自动前进到拒绝仓,而不会中断系统的运行。

    Apparatus and method for managing voltage buses
    133.
    发明申请
    Apparatus and method for managing voltage buses 有权
    用于管理电压母线的装置和方法

    公开(公告)号:US20050140349A1

    公开(公告)日:2005-06-30

    申请号:US10750735

    申请日:2003-12-31

    Applicant: Duc Ho Scott Smith

    Inventor: Duc Ho Scott Smith

    CPC classification number: G11C5/14 G06F1/26 G11C11/4074

    Abstract: The present technique relates to a method and apparatus for managing voltage buses. In a memory device, such as SRAM or DRAM, a periphery voltage bus may supply voltage to periphery circuitry and an array voltage bus may supply voltage to array circuitry. A bridge circuit may be utilized to isolate the buses from each other and couple the buses together, depending on the control signals are received by the bridge circuit. As such, the bridge circuit enhances the operation of the memory device by reducing duplicative circuits and equalizing the voltage that are applied to the buses. In addition, the bridge circuit isolates the buses from each other to protect sensitive circuitry in the array and periphery circuitry from noise on the other bus.

    Abstract translation: 本技术涉及一种用于管理电压总线的方法和装置。 在诸如SRAM或DRAM的存储器件中,外围电压总线可以向外围电路提供电压,并且阵列电压总线可以向阵列电路提供电压。 桥接电路可用于将总线彼此隔离,并将总线耦合在一起,这取决于桥接电路接收的控制信号。 因此,桥式电路通过减少重复电路和均衡施加到总线的电压来增强存储器件的操作。 此外,桥接电路将总线彼此隔离,以保护阵列中的敏感电路和外围电路免受另一总线上的噪声。

    System and method for registering and deploying stored procedures and triggers into a device database
    134.
    发明申请
    System and method for registering and deploying stored procedures and triggers into a device database 失效
    将存储过程和触发器注册并部署到设备数据库中的系统和方法

    公开(公告)号:US20050114827A1

    公开(公告)日:2005-05-26

    申请号:US10718951

    申请日:2003-11-21

    CPC classification number: G06F8/20 Y10S707/99933

    Abstract: A development tool enables a device database to be created, managed, and deployed to a device as part of the a device project. The device database may have an installation property which provides logic for installing the device database at the device. Additionally, stored procedures and triggers may be registered with the device database. The registered stored procedures and triggers may be embedded in the device database and deployed to the device along with the device database.

    Abstract translation: 开发工具可以将设备数据库创建,管理和部署到设备作为设备项目的一部分。 设备数据库可能具有安装属性,该属性提供了在设备上安装设备数据库的逻辑。 此外,存储过程和触发器可以向设备数据库注册。 注册的存储过程和触发器可以嵌入到设备数据库中,并与设备数据库一起部署到设备。

    Reduced power redundancy address decoder and comparison circuit

    公开(公告)号:US20050099861A1

    公开(公告)日:2005-05-12

    申请号:US11015703

    申请日:2004-12-17

    CPC classification number: G11C29/83 G11C29/844

    Abstract: A redundancy address decoder for a memory having at least one bank of memory segmented into a plurality of memory blocks. The redundancy address decoder includes a plurality of redundancy comparison circuitry coupled to a respective programmable element block storing addresses that are mapped to redundant memory of a memory plane. The redundancy address decoder further includes redundancy driver select logic coupled to each of the redundancy comparison circuitry to activate a selected one of the redundancy comparison circuitry for comparing a portion of a memory address corresponding to a memory location with the programmed addresses of the respective programmable element blocks, which leads to power reduction for column accesses to the memory device. The selection of the redundancy driver is based on the memory bank in which the memory location is located.

    Superabsorbent polymer aqueous paste and coating
    136.
    发明申请
    Superabsorbent polymer aqueous paste and coating 有权
    超吸收性聚合物水性糊剂和涂料

    公开(公告)号:US20050080182A1

    公开(公告)日:2005-04-14

    申请号:US10685080

    申请日:2003-10-14

    Abstract: The present invention is directed to an aqueous superabsorbent polymer paste comprising from about 1 to about 5 wt % of superabsorbent particles and from about 95 to about 99 wt % of an aqueous water-soluble solution having from about 0.5 to about 5%, preferably from about 1 to about 3% solid level. The present invention is also directed to a coated substrate comprising a substrate material and an aqueous superabsorbent polymer paste comprising a blend of i) from about 1 to about 5 wt % of superabsorbent particles and ii) from about 95 to about 99 wt % of an aqueous water-soluble solution. The present invention is also directed to a method for reducing the loss of circulation fluids into flow passages of a subterranean formation during well drilling, completion or work over operations, by using the aqueous superabsorbent polymer paste of the present invention.

    Abstract translation: 本发明涉及含水超吸收性聚合物糊剂,其包含约1至约5重量%的超吸收颗粒和约95至约99重量%的水溶性水溶液,其具有约0.5至约5重量%,优选为 约1%至3%固体含量。 本发明还涉及包含基材和含水超吸收聚合物浆料的涂覆基材,该糊状物包含i)约1至约5重量%的超吸收颗粒和ii)约95至约99重量%的 水溶性水溶液。 本发明还涉及一种通过使用本发明的水性超吸收聚合物浆料来减少在钻井,完井或作业过程中循环流体损失到地层的流动通道中的损失的方法。

    Insertion control
    137.
    发明申请
    Insertion control 有权
    插入控制

    公开(公告)号:US20050065638A1

    公开(公告)日:2005-03-24

    申请号:US10949009

    申请日:2004-09-23

    Abstract: An insertion system for collating sheets of printed material for insertion into an envelope is disclosed. The insertion system includes an insertion machine, application software and an operating system. Included in the application software is a first function and a second function, where the first function performs tracking for each packet and the second function controls operation of the insertion machine. Each packet includes a plurality of pieces of printed material that may ultimately be sealed in an envelope. The operating system runs the application software at any given instant and executes the first and second functions.

    Abstract translation: 公开了一种用于整理用于插入到信封中的打印材料片的插入系统。 插入系统包括插入机,应用软件和操作系统。 包括在应用软件中的是第一功能和第二功能,其中第一功能对每个分组执行跟踪,第二功能控制插入机的操作。 每个分组包括可以最终密封在信封中的多个打印材料片。 操作系统在任何给定的时刻运行应用软件,并执行第一和第二功能。

    REDUCED POWER REDUNDANCY ADDRESS DECODER AND COMPARISON CIRCUIT
    138.
    发明申请
    REDUCED POWER REDUNDANCY ADDRESS DECODER AND COMPARISON CIRCUIT 有权
    减少功率冗余地址解码器和比较电路

    公开(公告)号:US20050002243A1

    公开(公告)日:2005-01-06

    申请号:US10613305

    申请日:2003-07-02

    CPC classification number: G11C29/83 G11C29/844

    Abstract: A redundancy address decoder for a memory having at least one bank of memory segmented into a plurality of memory blocks. The redundancy address decoder includes a plurality of redundancy comparison circuitry coupled to a respective programmable element block storing addresses that are mapped to redundant memory of a memory plane. The redundancy address decoder further includes redundancy driver select logic coupled to each of the redundancy comparison circuitry to activate a selected one of the redundancy comparison circuitry for comparing a portion of a memory address corresponding to a memory location with the programmed addresses of the respective programmable element blocks, which leads to power reduction for column accesses to the memory device. The selection of the redundancy driver is based on the memory bank in which the memory location is located.

    Abstract translation: 一种用于存储器的冗余地址解码器,其具有被分割成多个存储块的至少一组存储器。 冗余地址解码器包括耦合到存储映射到存储器平面的冗余存储器的地址的相应可编程元件块的多个冗余比较电路。 冗余地址解码器还包括耦合到冗余比较电路中的每一个的冗余驱动器选择逻辑,以激活冗余比较电路中的所选择的一个,用于将对应于存储器位置的存储器地址的一部分与相应可编程元件的编程地址进行比较 块,这导致对存储器设备的列访问的功率降低。 冗余驱动器的选择基于存储器位置所在的存储体。

    High-speed interconnection adapter having automated lane de-skew
    139.
    发明授权
    High-speed interconnection adapter having automated lane de-skew 有权
    具有自动车道偏斜的高速互连适配器

    公开(公告)号:US06690757B1

    公开(公告)日:2004-02-10

    申请号:US09596980

    申请日:2000-06-20

    CPC classification number: H04L25/14

    Abstract: An adapter that buffers received symbols and automatically determines and corrects for skew between lanes is disclosed. In one embodiment, the adapter is a part of a network that includes a first and second devices coupled together by a communications link having multiple independent serial lanes. The first device Initiates communication by repeatedly transmitting a training sequence that includes a start symbol for each lane. An adapter in the second device includes a set of buffers each configured to receive the symbols conveyed by a corresponding serial lane. The buffers are coupled to a reconstruction circuit that removes one “symbol groups” at a time from the buffers. A symbol group is made up of one symbol from each buffer. The reconstruction circuit removes symbol groups until a start symbol is detected. If the start symbol is not detected in all buffers, output from buffers having start symbols is temporarily suspended.

    Abstract translation: 公开了缓冲接收到的符号并自动确定和校正车道之间的偏斜的适配器。 在一个实施例中,适配器是网络的一部分,其包括通过具有多个独立串行通道的通信链路耦合在一起的第一和第二设备。 第一设备通过重复地发送包括每个通道的开始符号的训练序列来启动通信。 第二设备中的适配器包括一组缓冲器,每个缓冲器被配置为接收由相应串行通道传送的符号。 缓冲器被耦合到重建电路,其从缓冲器一次移除一个“符号组”。 符号组由每个缓冲区中的一个符号组成。 重建电路去除符号组,直到检测到起始符号为止。 如果在所有缓冲区中没有检测到起始符号,则从具有起始符号的缓冲区输出暂时停止。

    Composite vascular graft
    140.
    发明授权
    Composite vascular graft 有权
    复合血管移植

    公开(公告)号:US06652570B2

    公开(公告)日:2003-11-25

    申请号:US09347218

    申请日:1999-07-02

    Abstract: A composite stent/graft tubular prosthesis includes an inner PTFE tubular structure, an outer PTFE tubular structure assembled about the inner PTFE tubular structure, and a circumferentially distensible stent interposed between the inner and outer PTFE tubular structures. The outer tubular body is a non-continuous body formed of polytetrafluoroethylene components, providing axial and circumferential compliance to said prosthesis. The outer tubular body completely overlies the distensible stent.

    Abstract translation: 复合支架/移植管状假体包括内部PTFE管状结构,围绕内部PTFE管状结构组装的外部PTFE管状结构以及插入在内部和外部PTFE管状结构之间的周向延伸支架。 外管体是由聚四氟乙烯构件形成的非连续体,其向所述假体提供轴向和圆周的顺应性。 外管状体完全覆盖扩张支架。

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