摘要:
A system used to synchronize the clock frequency of a receiver with that of a transmitter, where both the receiver and transmitter communicate using the ADSL Annex C standard. The transmitter continuously transmits pilot tones to the receiver. The receiver determines the phase error between sequential pilot tone symbols to determine a phase error. The receiver uses the phase error to adjust the receiver clock frequency. However, if the most recently received symbol is subject to near end cross talk or is subject to far end cross talk and is a boundary symbol, the receiver ignores the phase error and does not adjust the receiver clock frequency.
摘要:
A method and system for reducing data loss in digital communication between asynchronous digital devices. The method includes generating a first data transmission stream using a transmitter device, the first data stream synchronous to a first clock signal. A second data transmission stream is then generated using the transmitter device, wherein the second data transmission stream is a copy of the first data stream with a phase shift. A determination is then made as to whether the phase of the first clock signal is within a predetermined amount of the phase of a receiver clock signal of a receiver device, wherein the receiver clock signal is used by the receiver device to sample received data. The first data stream is transmitted to the receiver device when the phase of the first clock signal differs from the phase of the second clock signal by greater than the predetermined amount. The second data stream is transmitted to the receiver device when the phase of the first clock signal differs from the phase of the receiver clock signal by less than the predetermined amount such that jitter on the first clock signal and the receiver clock signal does not disrupt communication between the transmitter device and the receiver device.
摘要:
In a multi-carrier transmission system, a clock timing error (&tgr;e) is calculated at the receiver's side and used for synchronization between a transmitting modem and a receiving modem (RX1). The clock timing error (&tgr;e) is calculated from phase errors (&phgr;0, &phgr;1, . . . , &phgr;i, . . . , &phgr;N-1) detected for a plurality of pilot carriers during a tracking mode in such a way that the share (Ai) of a phase error (&phgr;i) detected for a particular pilot carrier in the clock timing error (&tgr;e) depends on the transmission quality (SNRi) of that pilot carrier over the transmission medium in between the two modems. In this way, the robustness of the synchronization for narrowband noise near a pilot carrier is improved significantly.
摘要:
An apparatus and method for compensating audio signals to be recorded on an optical disc to optimize usage of memory in an audio decoding circuit, and to neutralize invalid audio data to produce good audio quality. A determination is made with regard to whether audio data signals contain normal data or invalid data. Invalid data is adjusted into normal audio data, and stored in the memory. The volume of the data stored in the memory is monitored to detect overflow and underflow conditions of the memory, a data transmitting stopping signal being sent during an overflow condition of the memory, a data transmitting requesting signal being sent during an underflow condition. The audio data reproduced from the memory is decoded, and the decoded audio data is output. Undesired errors are prevented by monitoring the reproduced audio data for invalid data and by adjusting invalid data into normal data when detected.
摘要:
According to the present invention, an analog-mode discharge characteristic storage area (21a) and a digital-mode discharge characteristic storage area (21b) store threshold data of remaining battery display in an incoming-call standby status in an analog mode and that in a digital mode, respectively. A remaining battery determination means (20a) determines a remaining battery level corresponding to a selected communication mode based on both a voltage of detected by a voltage detection circuit (32) and data stored in the analog-mode discharge characteristic storage area (21a) or the digital-mode discharge characteristic storage area (21b). A remaining battery display control means (20b) causes the remaining battery to be displayed on an LCD display of a control unit (22) in accordance with a determination result of the remaining battery determination means (20a).
摘要:
An asynchronous signal input apparatus includes a memory device which writes data that are input at a predetermined frequency, in response to a write signal, and reads data in response to a read signal. A data quantity measuring device measures a data quantity representing a quantity of data stored in the memory device. A read signal generating device generates the read signal at a frequency that varies depending upon the measured data quantity. A sampling frequency conversion apparatus comprises the memory device, data quantity measuring device, and read signal generating device employed in the asynchronous signal input apparatus. Further, the read signal generating device includes a converter which performs non-linear conversion on the data quantity measured by the data quantity measuring device. An interpolation information producing device produces interpolation information to be used for data generated from the memory device, based on the data quantity to which the non-linear gain is given by the converter. An interpolation device interpolates data that are read from the memory device in response to the read signal, based on the produced interpolation information.
摘要:
The bit stream reproducing apparatus is comprised of a frame length counter for measuring a data length of one frame; a first calculator for calculating a data length “L1” defined from a header to a scale factor; a second calculator for calculating a data length “L2” of an audio sample; and a third calculator for executing a calculation of E=F−(L1+L2×12) based upon calculation results of the first calculator and of the second calculator, and for sending out a control signal to a muting circuit so as to instruct a muting operation in the case of E
摘要:
In an integrated circuit, a low voltage swing logic communication bus has N+2 data wires for N data signals. Each of the N data signals is carried on its own wire. The communication bus includes two other reference signals.
摘要:
The invention refers to an apparatus for generating a reference frequency depending on a timing information extracted from a data stream. In order to generate a carrier frequency in a user station of a satellite TDMA network at low costs which is accurate and stable and which meets stringent phase noise requirements, it is suggested to use at least one free-running oscillator. The frequency deviation with regard to the timing information extracted from the data stream is estimated by an estimation means. At least two oscillation signals are derived from the at least one oscillation means and are linked together by a linking means yielding said reference frequency. A frequency correction value is applied to at least one of the oscillation signals such that the timing information given by the reference frequency corresponds to the timing information extracted from said data stream.
摘要:
In the method and device for tuning a first oscillator with a second oscillator respective response signals of the first oscillator are produced from corresponding frequency-shifted and/or phase-shifted signals of the second oscillator. The first oscillator is tuned to the second oscillator according to the difference of the respective response signals. For amplitude correction a quotient is formed by dividing an output signal by the sum of the response signals. The method and device according to the invention are especially useful in a rotation rate sensor. The invention also includes a rotation rate sensor, which includes a device for determining rotation rate from the oscillations of a first and second oscillator and the device for tuning the first oscillator with the second oscillator.