公开(公告)号：US11527208B2

公开(公告)日：2022-12-13

申请号：US17665682

申请日：2022-02-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki

IPC: G09G3/3266 ,  G02F1/1362 ,  G09G3/34

Abstract: It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.

公开(公告)号：US11500254B2

公开(公告)日：2022-11-15

申请号：US17488398

申请日：2021-09-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime Kimura ,  Atsushi Umezaki

IPC: G02F1/1362 ,  G09G3/00 ,  G09G3/36 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786 ,  G02F1/167 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1343 ,  H01L29/423

Abstract: An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.

公开(公告)号：US11455969B2

公开(公告)日：2022-09-27

申请号：US17460497

申请日：2021-08-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki ,  Hajime Kimura

IPC: G09G3/36 ,  G11C19/28 ,  H01L27/088 ,  G02F1/133 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

Abstract: A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.

公开(公告)号：US11257853B2

公开(公告)日：2022-02-22

申请号：US17169602

申请日：2021-02-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki

IPC: H01L27/12 ,  H01L29/786 ,  G09G3/14 ,  H03B1/00 ,  H03K3/00 ,  G09G3/32 ,  G09G3/36 ,  H03K17/687 ,  G11C19/00

Abstract: Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.

公开(公告)号：US11237445B2

公开(公告)日：2022-02-01

申请号：US16732445

申请日：2020-01-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki ,  Hiroyuki Miyake

IPC: G02F1/1368 ,  G02F1/1362 ,  G09G3/20 ,  G09G3/3275 ,  G09G3/34 ,  G09G3/36 ,  H01L27/12 ,  H01L29/423 ,  G09G3/3233 ,  G09G3/3266 ,  H01L27/15 ,  H01L27/32

Abstract: An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

公开(公告)号：US11194203B2

公开(公告)日：2021-12-07

申请号：US16828217

申请日：2020-03-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki

IPC: G09G3/36 ,  G02F1/1362 ,  G09G3/34 ,  G11C19/28 ,  H01L27/06 ,  H01L27/15 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  G02F1/133 ,  G02F1/1345 ,  G02F1/1368 ,  H01L27/32 ,  G02F1/1337 ,  G02F1/139 ,  G02F1/1335 ,  H01L21/67 ,  H01L51/52 ,  H01L51/56

Abstract: A first transistor, a second transistor, a third transistor, a fourth transistor are provided. In the first transistor, a first terminal is electrically connected to a first wiring; a second terminal is electrically connected to a gate terminal of the second transistor; a gate terminal is electrically connected to a fifth wiring. In the second transistor, a first terminal is electrically connected to a third wiring; a second terminal is electrically connected to a sixth wiring. In the third transistor, a first terminal is electrically connected to a second wiring; a second terminal is electrically connected to the gate terminal of the second transistor; a gate terminal is electrically connected to a fourth wiring. In the fourth transistor, a first terminal is electrically connected to the second wiring; a second terminal is electrically connected to the sixth wiring; a gate terminal is connected to the fourth wiring.

公开(公告)号：US11189647B2

公开(公告)日：2021-11-30

申请号：US16889897

申请日：2020-06-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki

IPC: H01L27/12 ,  G09G3/36 ,  G09G3/20 ,  H01L21/84 ,  G02F1/1368 ,  H01L27/15 ,  G02F1/133 ,  G02F1/1362 ,  H01L27/32 ,  H01L29/786

Abstract: To provide a circuit used for a shift register or the like. The basic configuration includes first to fourth transistors and four wirings. The power supply potential VDD is supplied to the first wiring and the power supply potential VSS is supplied to the second wiring. A binary digital signal is supplied to each of the third wiring and the fourth wiring. An H level of the digital signal is equal to the power supply potential VDD, and an L level of the digital signal is equal to the power supply potential VSS. There are four combinations of the potentials of the third wiring and the fourth wiring. Each of the first transistor to the fourth transistor can be turned off by any combination of the potentials. That is, since there is no transistor that is constantly on, deterioration of the characteristics of the transistors can be suppressed.

公开(公告)号：US11170728B2

公开(公告)日：2021-11-09

申请号：US16785710

申请日：2020-02-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki ,  Hajime Kimura

IPC: G09G3/36 ,  G11C19/28 ,  H01L27/088 ,  G02F1/133 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

Abstract: A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.

公开(公告)号：US11151953B2

公开(公告)日：2021-10-19

申请号：US16985586

申请日：2020-08-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Atsushi Umezaki

IPC: G09G3/36 ,  H01L23/528 ,  G02F1/1345 ,  G02F1/1362 ,  H01L29/786 ,  G11C19/28 ,  H01L27/12 ,  G02F1/136

Abstract: A driver circuit includes first to third transistors, a first circuit, and a second circuit. In the first transistor, a first terminal is electrically connected to a second wiring, a second terminal is electrically connected to a first wiring, and a gate is electrically connected to the second circuit and a first terminal of the third transistor. In the second transistor, a first terminal is electrically connected to the first wiring, a second terminal is electrically connected to a sixth wiring, a gate is electrically connected to the first circuit and a gate of the third transistor. A second terminal of the third transistor is electrically connected to the sixth wiring. The first circuit is electrically connected to a third wiring, a fourth wiring, a fifth wiring, and the sixth wiring. The second circuit is electrically connected to the first wiring, the second wiring, and the sixth wiring.

公开(公告)号：US11143925B2

公开(公告)日：2021-10-12

申请号：US16925535

申请日：2020-07-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime Kimura ,  Atsushi Umezaki

IPC: G02F1/1362 ,  G09G3/00 ,  G09G3/36 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/786 ,  G02F1/167 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1343 ,  H01L29/423

Abstract: An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.