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公开(公告)号:US20230231478A1
公开(公告)日:2023-07-20
申请号:US18145863
申请日:2022-12-23
Applicant: Richtek Technology Corporation
Inventor: Po-Yen CHEN , Hsing-Shen HUANG
Abstract: A conversion control circuit, configured to control a switching power converter, includes a trigger signal generation circuit, an on-time control circuit, and a logic driver circuit. The trigger signal generation circuit is configured to generate a turn-on trigger signal. The on-time control circuit is configured to generate a turn-off trigger signal to determine the on-time and/or the off-time of a pulse width modulation (PWM) signal, and adjusts the on-time and/or the off-time according to the input voltage and the output voltage, such that the switching frequency of the switching power converter is adaptively adjusted according to a ratio between the output voltage and the input voltage. The logic driver circuit is configured to generate the PWM signal according to the turn-on trigger signal and the turn-off trigger signal, wherein the turn-on trigger signal enables the PWM signal, and the turn-off trigger signal disables the PWM signal.
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公开(公告)号:US20230223843A1
公开(公告)日:2023-07-13
申请号:US18065205
申请日:2022-12-13
Applicant: Richtek Technology Corporation
Inventor: Kuo-Chi Liu , Ta-Yung Yang
CPC classification number: H02M3/07 , H02M1/0058 , H02M3/158
Abstract: A switched capacitor voltage converter circuit includes: a switched capacitor converter, a control circuit and a zero current estimation circuit. The switched capacitor converter includes at least one resonant capacitor, switches and at least one inductor. The zero current estimation circuit is coupled to the at least one inductor and/or the at least one resonant capacitor, for estimating a time point at which a first resonant current is zero during a first process and/or a time point at which a second resonant current is zero during a second process according to a voltage difference between two ends of the inductor, and/or a voltage difference between two ends of the resonant capacitor, to a generate a zero current estimation signal accordingly for generating the operation signal.
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公开(公告)号:US20230216425A1
公开(公告)日:2023-07-06
申请号:US17840540
申请日:2022-06-14
Applicant: Richtek Technology Corporation
Inventor: Ta-Yung Yang , Yu-Chang Chen
CPC classification number: H02M7/219 , H02M1/0003 , H02M1/08
Abstract: A synchronous full-bridge rectifier circuit includes: a first high-side transistor, a first low-side transistor, a second high-side transistor and a second low-side transistor which are configured to generate a DC power source from an AC power source, wherein the first high-side transistor and the first low-side transistor are coupled to a live wire of the AC power source, and the second high-side transistor and the second low-side transistor are coupled to a neutral wire of the AC power source; a first detection transistor, coupled to the live wire and configured to generate a first detection signal; and a second detection transistor, coupled to the neutral wire configured to generate a second detection signal; wherein the first low-side transistor is turned on after the body-diode of the first low-side transistor is turned on; the second low-side transistor is turned on after the body-diode of the second low-side transistor is turned on.
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164.
公开(公告)号:US20230216410A1
公开(公告)日:2023-07-06
申请号:US18146493
申请日:2022-12-27
Applicant: Richtek Technology Corporation
Inventor: Shei-Chie Yang , Yuan-Yen Mai , Pao-Hsun Yu , Cheng-Hung Hsu
CPC classification number: H02M3/1582 , H02M1/0054
Abstract: A buck-boost switching regulator includes: a power switch circuit including an input switch unit and an output switch unit; a bypass control circuit configured to operably generate a bypass control signal according to a conversion voltage difference between an input voltage of an input power and an output voltage of an output power and according to whether an inductor current flowing through an inductor reaches an output current of the output power; and a bypass switch circuit, wherein when the conversion voltage difference is below a reference voltage and when the inductor current flowing through the inductor reaches the output current, the bypass control signal controls the bypass switch circuit to electrically connect the input power with the output power, so that the buck-boost switching regulator operates in a bypass mode.
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公开(公告)号:US20230216401A1
公开(公告)日:2023-07-06
申请号:US17933877
申请日:2022-09-21
Applicant: Richtek Technology Corporation
Inventor: Min-Hung Hu
Abstract: A multi-stage amplifier circuit includes: a front stage amplification circuit, for generating a front stage amplification signal according to a difference between a primary reference signal and a primary feedback signal; an output adjustment circuit, for generating a driving signal according to the front stage amplification signal; and an output transistor, controlled by the driving signal to generate an output signal. The output adjustment circuit includes: an adjustment transistor biased by a differential current of the front stage amplification signal; and an impedance adjustment device biased by the differential current. A resistance of the impedance adjustment device is determined by a difference between an adjustment feedback signal and an adjustment reference signal. The driving signal is determined by a product of a resistance of the impedance adjustment device multiplied by the differential current of the front stage amplification signal, and a drain-source voltage of the adjustment transistor.
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公开(公告)号:US20230205247A1
公开(公告)日:2023-06-29
申请号:US18145280
申请日:2022-12-22
Applicant: Richtek Technology Corporation
Inventor: Min-Hung HU
CPC classification number: G05F1/575 , G05F1/565 , H03F3/45179
Abstract: An impedance-tracking circuit includes a voltage divider, a first dynamic resistor, and a first amplifier. The voltage divider divides a voltage difference between a first voltage and a second voltage to generate a divided voltage. The first dynamic resistor has a first resistance value and is coupled between the first voltage and a third voltage. The first dynamic resistor adjusts the first resistance value according to a first control signal. The first amplifier compares the divided voltage with the third voltage to generate the first control signal.
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167.
公开(公告)号:US20230198403A1
公开(公告)日:2023-06-22
申请号:US17553535
申请日:2021-12-16
Applicant: RICHTEK TECHNOLOGY CORPORATION
Inventor: JE-KWANG CHO
CPC classification number: H02M3/1582 , H02M1/32 , H02H7/1213
Abstract: A power conversion circuit includes a first and a second power converters for generating a first and a second driving voltages respectively. The second power converter is a switching converter. In a short-circuit detection mode, the first driving voltage is regulated to the first driving level, and the second power converter is configured to operate in a pulse frequency modulation mode to regulate the second driving voltage to a short-circuit detection level, and when a switching frequency of the second power converter exceeds a threshold frequency, a short-circuit condition between the second driving voltage and the first driving voltage is determined.
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168.
公开(公告)号:US20230197725A1
公开(公告)日:2023-06-22
申请号:US18052950
申请日:2022-11-07
Applicant: Richtek Technology Corporation
Inventor: Wu-Te Weng , Chih-Wen Hsiung , Ta-Yung Yang
IPC: H01L27/092 , H01L21/8238
CPC classification number: H01L27/0922 , H01L27/0928 , H01L21/823857 , H01L21/823871 , H01L21/823878 , H01L21/823892 , H01L21/823814
Abstract: An integrated structure of CMOS devices includes: a semiconductor layer, insulation regions, a first high voltage P-type well and a second high voltage P-type well, a first high voltage N-type well and a second high voltage N-type well, a first low voltage P-type well and a second low voltage P-type well, a first low voltage N-type well and a second low voltage N-type well, and eight gates. A CMOS device having an ultra high threshold voltage is formed in ultra high threshold device region; a CMOS device having a high threshold voltage is formed in high threshold device region; a CMOS device having a middle threshold voltage is formed in the middle threshold device region; and a CMOS device having a low threshold voltage is formed in the low threshold device region.
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169.
公开(公告)号:US20230179093A1
公开(公告)日:2023-06-08
申请号:US18049622
申请日:2022-10-25
Applicant: Richtek Technology Corporation
Inventor: Kuo-Chi Liu , Ta-Yung Yang
CPC classification number: H02M3/07 , H02M3/015 , H02M1/0009
Abstract: A switched capacitor voltage converter circuit includes: a switched capacitor converter and a control circuit. In a charging process of a resonant operation mode, the switches in the switched capacitor converter operate to form a series connection of at least one capacitor and an inductor between a first voltage and a second voltage, as a charging path. In a discharging process of the resonant operation mode, the switches operate to form a series connection of each capacitor and the inductor between the second voltage and a ground level, thus forming plural discharging paths simultaneously or sequentially. In an inductor switching mode, the switches operate to couple one end of the inductor to the first voltage or the ground level alternatingly. The control circuit decides to operate in the resonant operation mode or the inductor switching mode according to the first voltage, thereby maintaining the second voltage within a predetermined range.
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公开(公告)号:US11658650B1
公开(公告)日:2023-05-23
申请号:US17722796
申请日:2022-04-18
Applicant: Richtek Technology Corporation
Inventor: Jian-Ming Fu , Huan-Chien Yang
Abstract: A PWM (Pulse Width Modulation) controller includes a current detector, a current emulator, a voltage-to-current converter, and a current adder. The current detector detects a first current, and generates a second current according to the first current. The current detector receives an input voltage and outputs an output voltage. The current emulator obtains the relative information of a lower-gate current. The voltage-to-current converter draws a third current from the current emulator according to the input voltage and the output voltage. The current emulator generates a fourth current according to the relative information and the third current. The current adder adds the fourth current to the second current, so as to generate a sum current.
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