公开(公告)号：US20220224233A1

公开(公告)日：2022-07-14

申请号：US17566678

申请日：2021-12-30

Applicant: Richtek Technology Corporation

Inventor： Shei-Chie Yang ,  Jian-Yu Tu ,  Yuan-Yen Mai ,  Pao-Hsun Yu

IPC: H02M3/158 ,  H02M1/00

Abstract: A buck-boost switching regulator includes: a power switch circuit including an input switch unit and an output switch unit which switch a first terminal and a second terminal of an inductor for buck-boost conversion; at least one low dropout regulator correspondingly coupled to at least one output high side switch in the output switch unit to correspondingly convert at least one low dropout voltage into at least one output voltage; and a bypass control circuit configured to operably generate a bypass control signal according to a conversion voltage difference between the input voltage and the corresponding low dropout voltage; wherein when the corresponding conversion voltage difference is lower than a reference voltage, the bypass control signal controls a corresponding bypass switch to electrically connect the input voltage with the corresponding low dropout node.

公开(公告)号：US11381173B2

公开(公告)日：2022-07-05

申请号：US17145402

申请日：2021-01-11

Applicant: Richtek Technology Corporation

Inventor： Yung-Jen Chen ,  Yu-Chieh Lin ,  Chia-Chi Liu ,  Fu-To Lin

IPC: H02M3/158 ,  H02M1/08 ,  G05F1/575 ,  G05F1/565 ,  H02M1/00 ,  H02M3/156

Abstract: A switching regulator which has load transient quick response ability includes at least one power stage circuit and a control circuit. The control circuit includes a pulse width modulation (PWM) signal generation circuit and a quick response (QR) signal generation circuit. The PWM signal generation circuit generates a PWM signal according to an output voltage and a QR signal, to control a power switch of the corresponding power stage circuit, thus converting an input voltage to the output voltage. The QR signal generation circuit includes a differentiator circuit and a comparison circuit. The differentiator circuit performs a differential operation on a voltage sensing signal related to the output voltage, to generate a differential signal. The comparison circuit compares the differential signal with a QR threshold signal, such that when the differential signal exceeds the QR signal, the PWM signal generation circuit performs a QR procedure.

公开(公告)号：US20220208628A1

公开(公告)日：2022-06-30

申请号：US17565402

申请日：2021-12-29

Applicant: Richtek Technology Corporation

Inventor： Shih-Chieh Lin ,  Yong-Zhong Hu ,  Heng-Chi Huang ,  Hao-Lin Yen

IPC: H01L23/31 ,  H01L23/15 ,  H01L23/495 ,  H01L23/367

Abstract: A chip packaging structure includes: at least one semiconductor chip, having a signal processing function; a base material, wherein the semiconductor chip is disposed on the base material; at least one thermal conduction plate, disposed on the base material; and a package material, encapsulating the base material, the thermal conduction plate, and the semiconductor chip. The thermal conduction plate forms at least one thermal conduction channel in the package material.

公开(公告)号：US20220181238A1

公开(公告)日：2022-06-09

申请号：US17490038

申请日：2021-09-30

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A chip packaging method includes: providing a wafer, on which multiple bumps are formed; cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units; disposing the chip units on a base material; and providing a package material to encapsulate lateral sides and a bottom surface of each of the chip units, to form a chip package unit, wherein the bottom surface of the chip unit faces the base material; wherein, in the chip package unit, the bumps on the chip units abut against the base material, and wherein the vertical heat conduction elements directly connect to the base material, or the base material includes multiple through-holes and the vertical heat conduction elements pass through the multiple through-holes in the base material.

公开(公告)号：US20220165880A1

公开(公告)日：2022-05-26

申请号：US17666501

申请日：2022-02-07

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Tsung-Yi Huang ,  Kun-Huang Yu ,  Ying-Shiou Lin ,  Chu-Feng Chen ,  Chung-Yu Hung ,  Yi-Rong Tu

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/08

Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a gate, a source, a drain, and a drift oxide region. The semiconductor layer is formed on a substrate, wherein the semiconductor layer has at least one trench. The well is formed in the semicoducotor layer. The body region is formed in the well. The gate is formed on the well, and is in contact with the well. The source and the drain are located below, outside, and at different sides of the gate, in the body region and the well respectively. The drift oxide region is formed on a drift region, wherein a bottom surface of the drift oxide region is higher than a bottom surface of the trench.

公开(公告)号：US11329491B2

公开(公告)日：2022-05-10

申请号：US16890000

申请日：2020-06-02

Applicant: Richtek Technology Corporation

Inventor： Wei-Ting Tai ,  Wei-Hsu Chang

IPC: H02J7/00

Abstract: A distributed battery balance management method includes: performing a battery system balancing procedure by a battery system balance management unit and performing battery module balancing procedure by module balance management circuit (MBMC) of corresponding battery module (BM). The battery system balancing procedure includes: obtaining lowest module voltages of corresponding BMs; obtaining a lowest system voltage and an average system voltage of the battery system; determining whether the lowest module voltage of the corresponding BM is greater than the average system voltage; when yes, setting a balance time duty ratio of the corresponding MBMC as a first duty ratio; when no, setting the balance time duty ratio of the corresponding MBMC as a second duty ratio; and setting module balance enable signal of corresponding MBMC to be enable, thus allowing the corresponding BM to perform voltage balance control on the batteries in the corresponding BM.

公开(公告)号：US20220140758A1

公开(公告)日：2022-05-05

申请号：US17511631

申请日：2021-10-27

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Wei-Hsu Chang

IPC: H02P6/12 ,  H02P6/08

Abstract: A brushless DC electric (BLDC) motor driver circuit includes: a power stage circuit configured to operably drive a brushless DC electric (BLDC) motor according to a pulse width modulation (PWM) signal; and an abnormality diagnosis circuit, wherein when a first parameter is under control, the abnormality diagnosis circuit is configured to operably determine a rotation abnormality condition of the BLDC motor according to a second parameter; wherein the first parameter and the second parameter are correlated with the rotation of the BLDC motor.

公开(公告)号：US11297702B2

公开(公告)日：2022-04-05

申请号：US17060055

申请日：2020-09-30

Applicant: Richtek Technology Corporation

Inventor： Yu-Wen Chang ,  Leng-Nien Hsiu ,  Isaac Y. Chen

IPC: H05B45/10 ,  H05B45/325 ,  H05B45/37 ,  H03K3/356

Abstract: A dimmer interface circuit includes a buffer stage circuit and a PWM control circuit. The buffer stage circuit converts a dimming input signal to a dimming buffer signal. The buffer stage circuit includes: a power rail generation circuit, which generates a power rail according to the dimming input signal adaptively, so that the dimming input signal is between a high level voltage and a low level voltage of the power rail; and an amplification circuit, which receives the dimming input signal, to generate the dimming buffer signal. The power rail supplies electrical power to the amplification circuit, wherein the amplification circuit operates within a range between the high level voltage and the low level voltage. The PWM control circuit converts the dimming buffer signal to a PWM dimming signal, so as to adjust a brightness of an LED module.

公开(公告)号：US11290011B2

公开(公告)日：2022-03-29

申请号：US16884024

申请日：2020-05-26

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Yu-Lung Hung ,  Hsing-Shen Huang

IPC: H02M3/156 ,  H02M1/08

Abstract: A power conversion apparatus includes: a power supply circuit, a load switch and a control circuit. The power supply circuit generates a first power. The load switch controls the power path from the power supply circuit to a load. The control circuit generates a switching control signal to control a conduction level of the load switch according to an enable signal. The control circuit controls a level of the switching control signal to soft start from a first level to a second level. During the soft start period, the switching control signal has plural waveform segments including a first waveform segment and a second waveform segment. A level variation speed of the first waveform segment is higher than a level variation speed of the second waveform segment. The first waveform segment level precedes the second waveform segment level.

公开(公告)号：US20220060116A1

公开(公告)日：2022-02-24

申请号：US17367568

申请日：2021-07-05

Applicant: Richtek Technology Corporation

Inventor： Hsin-Yi Wu ,  Chien-Fu Tang

IPC: H02M3/335 ,  H01L29/78 ,  G01R19/00 ,  H03K17/082

Abstract: A power path switch circuit includes: a power transistor unit including: a first vertical double-diffused metal oxide semiconductor (VDMOS) device, wherein a first current outflow end of the first VDMOS device is coupled to an output end of a power path; and a second VDMOS device, wherein a first current inflow end of the first VDMOS device and a second current inflow end of the second VDMOS device are coupled with a supply end of the power path; and a voltage locking circuit coupled to the first current outflow end and the second current outflow end, for locking a voltage at the second current outflow end to a voltage at the first current outflow end, so that there is a predetermined ratio between a first conductive current flowing through the first VDMOS device and a second conductive current flowing through the second VDMOS device.