CHIP PACKAGING METHOD AND CHIP PACKAGE UNIT

    公开(公告)号:US20220181237A1

    公开(公告)日:2022-06-09

    申请号:US17356810

    申请日:2021-06-24

    Abstract: The present invention provides a chip packaging method, which includes: providing a base material, which includes plural finger contacts; disposing plural chips on the base material by flip chip mounting technology, and disposing plural vertical heat conducting elements surrounding each of the chips to connect the finger contacts on the base material; providing a packaging material to encapsulate the base material, the chips, and the vertical heat conducting elements; adhering a metal film on the packaging material via an adhesive layer, to form a package structure; and cutting the package structure into plural chip package units, wherein each of the chip package units includes one of the chips, a portion of the base material, a portion of the metal film, and a portion of the vertical heat conducting elements surrounding the chip.

    CHIP PACKAGING STRUCTURE
    8.
    发明申请

    公开(公告)号:US20220208628A1

    公开(公告)日:2022-06-30

    申请号:US17565402

    申请日:2021-12-29

    Abstract: A chip packaging structure includes: at least one semiconductor chip, having a signal processing function; a base material, wherein the semiconductor chip is disposed on the base material; at least one thermal conduction plate, disposed on the base material; and a package material, encapsulating the base material, the thermal conduction plate, and the semiconductor chip. The thermal conduction plate forms at least one thermal conduction channel in the package material.

    CHIP PACKAGING METHOD AND CHIP PACKAGE UNIT

    公开(公告)号:US20220181238A1

    公开(公告)日:2022-06-09

    申请号:US17490038

    申请日:2021-09-30

    Abstract: A chip packaging method includes: providing a wafer, on which multiple bumps are formed; cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units; disposing the chip units on a base material; and providing a package material to encapsulate lateral sides and a bottom surface of each of the chip units, to form a chip package unit, wherein the bottom surface of the chip unit faces the base material; wherein, in the chip package unit, the bumps on the chip units abut against the base material, and wherein the vertical heat conduction elements directly connect to the base material, or the base material includes multiple through-holes and the vertical heat conduction elements pass through the multiple through-holes in the base material.

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