Abstract:
An oscillator circuit (30, 40) for starting-up and operating at low voltages has been provided. The oscillator circuit includes an inverter circuit(31, 41) coupled across first and second terminals of a resonant circuit (14). The inverter circuit includes a push-pull driver stage having a P-channel transistor (18) and an N-channel transistor (20). The common drain electrodes of each are coupled to the second terminal of the resonant circuit. The source electrodes of the P- and N-channel transistors are respectively coupled to first and second supply voltage terminals. The gate electrode of the first transistor is coupled to the first terminal of resonant circuit. The inverter circuit further includes a circuit (32, 42) for shifting the voltage level applied to the gate electrode of the second transistor, relative to the voltage applied to the gate electrode of the first transistor, by a predetermined voltage. This has the effect of reducing the required operating voltage range of the inverter circuit while still maintaining both transistors active.
Abstract:
A semiconductor device used as a semiconductor memory device is disclosed which is made of an amorphous silicon material that provides either a "1" or "0" memory state when the amorphous silicon material is in a non-conduction or insulating state and a "0" or "1" memory state when the amorphous silicon material is transformed, by use of a breakdown voltage applied to electrodes coupled thereto, into a conducting state. The amorphous silicon material is located adjacent to a doped semiconductor region of a semiconductor substrate separated only by a relatively thin primarily metal ohmic contact. The resulting semiconductor structure for the semiconductor device or semiconductor memory device is primarily a single level metalization type structure. A write-once, read-only semiconductor memory array is also disclosed which uses, as each memory cell of the array, one of the disclosed semiconductor memory devices. Methods for producing the semiconductor memory device and write-once, read-only semiconductor memory array are also disclosed.
Abstract:
A microcontroller is adapted, when operating, to execute programs and instructions and, in response, to generate control signals to selectively control external apparatus. The microcontroller includes a power supply for supplying power to the overall device within a predetermined range suitable for its operation, and a clock for supplying a clock frequency to the microcontroller with a stability suitable for precise timing and counting within the device. The microcontroller is selectively reset to prevent it from executing programs and instructions for purposes of generating the control signals, and is maintained in the reset condition despite initiation of a removal from the reset condition, until the power supplied by the power supply is in a predetermined range and the clock frequency supplied by the clock is stable. In this way, no execution by the microcontroller is permitted until device stability is achieved, to prevent errors in execution. In the disclosed embodiment, the reset condition is maintained by a power-up timer and an oscillator start-up timer, each timer having a programmable timeout interval to end the reset condition only when the timeout intervals of both timers have expired.