DYNAMIC PERFORMANCE MANAGEMENT
    11.
    发明申请
    DYNAMIC PERFORMANCE MANAGEMENT 审中-公开
    动态性能管理

    公开(公告)号:US20120005503A1

    公开(公告)日:2012-01-05

    申请号:US13231854

    申请日:2011-09-13

    申请人: Aviad Wertheimer

    发明人: Aviad Wertheimer

    IPC分类号: G06F1/32

    摘要: A dynamic power management technique to optimize the performance to a pre-defined power or temperature limit. A computing system may comprise a performance management unit that may reconfigure the performance parameters, dynamically, based on the pre-defined power or temperature limit. Such an approach may provide performance enhancements as the power consumed by various components of the computing system may be reduced.

    摘要翻译: 动态电源管理技术,将性能优化到预定义的功率或温度限制。 计算系统可以包括可以基于预定义的功率或温度限制来动态地重新配置性能参数的性能管理单元。 这样的方法可以提供性能增强,因为可以减少计算系统的各种组件所消耗的功率。

    Method and system for power consumption reduction by network devices as a function of network activity
    12.
    发明申请
    Method and system for power consumption reduction by network devices as a function of network activity 有权
    作为网络活动功能的网络设备降低功耗的方法和系统

    公开(公告)号:US20090080433A1

    公开(公告)日:2009-03-26

    申请号:US11902660

    申请日:2007-09-24

    申请人: Aviad Wertheimer

    发明人: Aviad Wertheimer

    IPC分类号: H04L12/56

    摘要: A method and system may provide power consumption reduction by a network device. A device on a network and its components each may capable of operating in a low-power state and a high power state. The device may include a host to run an application and a network controller to interface with the network. The network controller may include a host interface logic to interface with host, a micro-engine or other logic to process network maintenance data packets, and a filter to classify data packets. The filter may classify a received data packet having an associated data type and an associated destination by data type by data type and destination. The data packet may be sent to the micro-engine if the data type and destination of the packet may be processed by the micro-engine.

    摘要翻译: 方法和系统可以通过网络设备提供功耗降低。 网络上的设备及其组件各自可以在低功率状态和高功率状态下工作。 设备可以包括运行应用的主机和网络控制器以与网络接口。 网络控制器可以包括与主机接口的主机接口逻辑,用于处理网络维护数据分组的微引擎或其他逻辑,以及对数据分组进行分类的过滤器。 过滤器可以通过数据类型和目的地的数据类型来分类具有关联数据类型的接收数据分组和相关联的目的地。 如果分组的数据类型和目的地可以由微引擎处理,则数据分组可以被发送到微引擎。

    Calibration for source-synchronous high frequency bus synchronization schemes
    13.
    发明授权
    Calibration for source-synchronous high frequency bus synchronization schemes 有权
    源同步高频总线同步方案的校准

    公开(公告)号:US08850258B2

    公开(公告)日:2014-09-30

    申请号:US13528704

    申请日:2012-06-20

    IPC分类号: G06F1/12

    CPC分类号: G06F1/12

    摘要: Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules.

    摘要翻译: 实施例提供了包括源模块,多个目的地模块和数据对准控制器的总线同步系统。 源模块被配置为使数据总线的多个数据段与源时钟信号同步,并将相应的同步数据段发送到各个目标模块。 源模块还被配置为将源时钟信号与同步数据段同时发送到目的地模块。 源模块此后接收来自各个目标模块的反馈时钟信号,反馈时钟信号是源时钟信号的延迟版本。 数据对准控制器基于接收到的反馈时钟信号调整各个目的地模块的输出延迟时间,以及时地对准目的地模块的输出信号。

    WORKLOAD MIGRATION DETERMINATION AT MULTIPLE COMPUTE HIERARCHY LEVELS
    14.
    发明申请
    WORKLOAD MIGRATION DETERMINATION AT MULTIPLE COMPUTE HIERARCHY LEVELS 审中-公开
    多种计算机层级的工作量移动确定

    公开(公告)号:US20140215041A1

    公开(公告)日:2014-07-31

    申请号:US13995214

    申请日:2012-03-16

    IPC分类号: H04L12/24

    摘要: An embodiment may include circuitry to determine at a first hierarchy level of a compute hierarchy, whether to consolidate, at least in part, respective workloads of respective compute entities at the first hierarchy level. The respective workloads may involve one or more respective processes of the respective compute entities. The circuitry may determine whether to consolidate, at least in part, the respective workloads based at least in part upon whether at least one migration condition involving at least one of the one or more respective processes is satisfied. After determining whether to consolidate, at least in part, the respective workloads, the circuitry may determine at a second hierarchy level of the compute hierarchy, whether to consolidate, at least in part, other respective workloads of other respective compute entities at the second hierarchy level. The second hierarchy level may be relatively lower in the compute hierarchy than the first hierarchy level.

    摘要翻译: 一个实施例可以包括用于在计算层级的第一层级确定至少部分地是否在第一层次级别合并相应计算实体的相应工作负载的电路。 相应的工作负载可以涉及各个计算实体的一个或多个相应的进程。 该电路可以至少部分地基于是否满足涉及一个或多个相应处理中的至少一个的至少一个迁移条件来确定是否至少部分地合并相应的工作负载。 在确定是否至少部分地合并各自的工作负载之后,电路可以在计算层级的第二层级确定是否至少部分地将第二层次上的其他各个计算实体的其他相应的工作负载 水平。 计算层次结构中的第二层次级别可能比第一级别级别相对较低。

    Dynamic performance management of network interface
    15.
    发明授权
    Dynamic performance management of network interface 有权
    网络接口的动态性能管理

    公开(公告)号:US08020009B2

    公开(公告)日:2011-09-13

    申请号:US11678183

    申请日:2007-02-23

    申请人: Aviad Wertheimer

    发明人: Aviad Wertheimer

    IPC分类号: G06F1/32 H04L12/00

    摘要: A dynamic power management technique to optimize the performance to a pre-defined power or temperature limit. A computing system may comprise a performance management unit that may reconfigure the performance parameters, dynamically, based on the pre-defined power or temperature limit. Such an approach may provide performance enhancements as the power consumed by various components of the computing system may be reduced.

    摘要翻译: 动态电源管理技术,将性能优化到预定义的功率或温度限制。 计算系统可以包括可以基于预定义的功率或温度限制来动态地重新配置性能参数的性能管理单元。 这样的方法可以提供性能增强,因为可以减少计算系统的各种组件所消耗的功率。

    Negotiating a transmit wake time
    16.
    发明申请
    Negotiating a transmit wake time 有权
    谈判发送唤醒时间

    公开(公告)号:US20100241880A1

    公开(公告)日:2010-09-23

    申请号:US12381811

    申请日:2009-03-17

    IPC分类号: G06F1/26

    摘要: Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.

    摘要翻译: 包括从链路伙伴接收指定链路伙伴接收唤醒时间的消息并且解析为所接收的链路伙伴的较小者接收唤醒时间和本地发送唤醒时间。

    Discharge protection circuit
    17.
    发明申请
    Discharge protection circuit 审中-公开
    放电保护电路

    公开(公告)号:US20080074813A1

    公开(公告)日:2008-03-27

    申请号:US11527923

    申请日:2006-09-26

    IPC分类号: H02H9/00

    CPC分类号: H02H9/046

    摘要: In some embodiments, a discharge protection circuit having an operational mode and a protection mode is provided.

    摘要翻译: 在一些实施例中,提供具有操作模式和保护模式的放电保护电路。

    Method for assigning priority to receive and transmit requests in
response to occupancy of receive and transmit buffers when transmission
and reception are in progress
    18.
    发明授权
    Method for assigning priority to receive and transmit requests in response to occupancy of receive and transmit buffers when transmission and reception are in progress 失效
    用于在发送和接收进行时响应于接收和发送缓冲器的占用而分配接收和发送请求的优先级的方法

    公开(公告)号:US5546543A

    公开(公告)日:1996-08-13

    申请号:US37287

    申请日:1993-03-26

    CPC分类号: G06F13/30 G06F13/362

    摘要: An arbiter of an I/O controller implements an arbitration process for controlling bi-directional data flow between a local area network and a main memory connected to a system bus having variable latency. A receive state machine of the controller manages inbound data bursts from the network by temporarily storing the data in a receive buffer before transfer to the main memory. Outbound data bursts from the main memory are managed by a transmit state machine of the controller, and are temporarily stored in a transmit buffer prior to transmission onto the network. The arbitration process assigns each of the receive and transmit state machines priority for accessing the system bus depending upon certain status conditions of the controller. These conditions include: (i) whether one or both of the state machines are contending for access to the system bus; (ii) whether the controller is configured for full-duplex or half-duplex communication over the network; (iii) the current status of the transmit and receive network ports; and (iv) the current state of the receive and transmit buffers.

    摘要翻译: I / O控制器的仲裁器实现仲裁过程,用于控制连接到具有可变等待时间的系统总线的局域网与主存储器之间的双向数据流。 控制器的接收状态机通过在传送到主存储器之前将数据临时存储在接收缓冲器中来管理来自网络的入站数据突发。 来自主存储器的出站数据突发由控制器的发送状态机管理,并且在传输到网络之前临时存储在发送缓冲器中。 仲裁过程根据控制器的某些状态条件将接收和发送状态机中的每一个分配给访问系统总线的优先级。 这些条件包括:(i)一台或两台状态机是否竞争访问系统总线; (ii)控制器是否配置为通过网络进行全双工或半双工通信; (iii)发送和接收网络端口的当前状态; 和(iv)接收和发送缓冲器的当前状态。