摘要:
A dynamic power management technique to optimize the performance to a pre-defined power or temperature limit. A computing system may comprise a performance management unit that may reconfigure the performance parameters, dynamically, based on the pre-defined power or temperature limit. Such an approach may provide performance enhancements as the power consumed by various components of the computing system may be reduced.
摘要:
A method and system may provide power consumption reduction by a network device. A device on a network and its components each may capable of operating in a low-power state and a high power state. The device may include a host to run an application and a network controller to interface with the network. The network controller may include a host interface logic to interface with host, a micro-engine or other logic to process network maintenance data packets, and a filter to classify data packets. The filter may classify a received data packet having an associated data type and an associated destination by data type by data type and destination. The data packet may be sent to the micro-engine if the data type and destination of the packet may be processed by the micro-engine.
摘要:
Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules.
摘要:
An embodiment may include circuitry to determine at a first hierarchy level of a compute hierarchy, whether to consolidate, at least in part, respective workloads of respective compute entities at the first hierarchy level. The respective workloads may involve one or more respective processes of the respective compute entities. The circuitry may determine whether to consolidate, at least in part, the respective workloads based at least in part upon whether at least one migration condition involving at least one of the one or more respective processes is satisfied. After determining whether to consolidate, at least in part, the respective workloads, the circuitry may determine at a second hierarchy level of the compute hierarchy, whether to consolidate, at least in part, other respective workloads of other respective compute entities at the second hierarchy level. The second hierarchy level may be relatively lower in the compute hierarchy than the first hierarchy level.
摘要:
A dynamic power management technique to optimize the performance to a pre-defined power or temperature limit. A computing system may comprise a performance management unit that may reconfigure the performance parameters, dynamically, based on the pre-defined power or temperature limit. Such an approach may provide performance enhancements as the power consumed by various components of the computing system may be reduced.
摘要:
Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.
摘要:
An arbiter of an I/O controller implements an arbitration process for controlling bi-directional data flow between a local area network and a main memory connected to a system bus having variable latency. A receive state machine of the controller manages inbound data bursts from the network by temporarily storing the data in a receive buffer before transfer to the main memory. Outbound data bursts from the main memory are managed by a transmit state machine of the controller, and are temporarily stored in a transmit buffer prior to transmission onto the network. The arbitration process assigns each of the receive and transmit state machines priority for accessing the system bus depending upon certain status conditions of the controller. These conditions include: (i) whether one or both of the state machines are contending for access to the system bus; (ii) whether the controller is configured for full-duplex or half-duplex communication over the network; (iii) the current status of the transmit and receive network ports; and (iv) the current state of the receive and transmit buffers.