公开(公告)号：US20130346785A1

公开(公告)日：2013-12-26

申请号：US13528704

申请日：2012-06-20

申请人： Yoav Lossin ,  Aviad Wertheimer

发明人： Yoav Lossin ,  Aviad Wertheimer

IPC分类号： G06F1/12

CPC分类号： G06F1/12

摘要： Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules.

摘要翻译： 实施例提供了包括源模块，多个目的地模块和数据对准控制器的总线同步系统。 源模块被配置为使数据总线的多个数据段与源时钟信号同步，并将相应的同步数据段发送到各个目标模块。 源模块还被配置为将源时钟信号与同步数据段同时发送到目的地模块。 源模块此后接收来自各个目标模块的反馈时钟信号，反馈时钟信号是源时钟信号的延迟版本。 数据对准控制器基于接收到的反馈时钟信号调整各个目的地模块的输出延迟时间，以及时地对准目的地模块的输出信号。

公开(公告)号：US08201005B2

公开(公告)日：2012-06-12

申请号：US12381811

申请日：2009-03-17

申请人： Aviad Wertheimer ,  Robert Hays

发明人： Aviad Wertheimer ,  Robert Hays

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/3209 ,  Y02D30/30

摘要： Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.

摘要翻译： 包括从链路伙伴接收指定链路伙伴接收唤醒时间的消息并且解析为所接收的链路伙伴的较小者接收唤醒时间和本地发送唤醒时间。

公开(公告)号：US5943479A

公开(公告)日：1999-08-24

申请号：US778327

申请日：1997-01-02

申请人： Philippe Klein ,  Aviad Wertheimer ,  Gideon Paul

发明人： Philippe Klein ,  Aviad Wertheimer ,  Gideon Paul

IPC分类号： G06F13/28 ,  G06F13/24 ,  G06F13/00

CPC分类号： G06F13/24

摘要： A method to reduce the rate of interrupts by the central processing unit (CPU) without any loss of interrupts. The method uses two parameters. The first parameter sets the event threshold, which is the maximum value of consecutive events allowed to occur, for example, the maximum number of received data packets before an interrupt is posted (for example, a receive interrupt) to the CPU. The second parameter sets the event time-out, which is the maximum time an event can be pending before posting an interrupt to the CPU. The second parameter is needed since the flow of events in the system is unpredictable and without the time-out limit handling of the event can be delayed indefinitely.

摘要翻译： 一种降低中央处理单元（CPU）中断速率的方法，而不会中断任何中断。 该方法使用两个参数。 第一个参数设置事件阈值，这是允许发生的连续事件的最大值，例如中断向CPU发布之前的接收数据包的最大数量（例如，接收中断）。 第二个参数设置事件超时，这是在向CPU发布中断之前事件可以等待的最大时间。 需要第二个参数，因为系统中的事件流是不可预知的，并且不能无限期地延迟事件的超时限制处理。

公开(公告)号：US20140082237A1

公开(公告)日：2014-03-20

申请号：US13623501

申请日：2012-09-20

申请人： Aviad Wertheimer ,  Daniel Greenspan

发明人： Aviad Wertheimer ,  Daniel Greenspan

IPC分类号： G06F13/14

CPC分类号： G06F13/14 ,  G06F13/4022

摘要： Methods, apparatus and systems for implementing run-time fabric reconfiguration are described herein. In accordance with one aspect, techniques are disclosed for implementing run-time fabric reconfiguration on a System on a Chip (SoC) via use of multiple endpoint fabric interfaces having routing logic that is dynamically reconfigured at run-time by a fabric control unit in response to system-state changes. The endpoint fabric interfaces may be coupled to or integrated in IP blocks that are coupled to a switch fabric, or may be implemented in the switch fabric itself. The run-time fabric reconfiguration techniques may be implemented to for various purposes and/or to address various events, such as node failures, security events, IP or design bugs, feature prototyping, and virtualization.

摘要翻译： 本文描述了用于实现运行时布局重新配置的方法，装置和系统。 根据一个方面，公开了用于通过使用具有路由逻辑的多个端点结构接口来在片上系统（SoC）上实现运行时间结构重新配置的技术，所述多个端点结构接口在运行时由结构控制单元响应地动态重新配置 到系统状态的变化。 端点结构接口可以耦合到或集成在耦合到交换结构的IP块中，或者可以在交换结构本身中实现。 运行时间结构重配置技术可以被实现用于各种目的和/或解决各种事件，例如节点故障，安全事件，IP或设计错误，特征原型和虚拟化。

公开(公告)号：US07835299B2

公开(公告)日：2010-11-16

申请号：US11902660

申请日：2007-09-24

申请人： Aviad Wertheimer

发明人： Aviad Wertheimer

IPC分类号： H04L12/26 ,  H04L12/28 ,  H04B7/185

CPC分类号： H04L12/12 ,  H04L45/00 ,  Y02D50/20 ,  Y02D50/40

摘要： A method and system may provide power consumption reduction by a network device. A device on a network and its components each may capable of operating in a low-power state and a high power state. The device may include a host to run an application and a network controller to interface with the network. The network controller may include a host interface logic to interface with host, a micro-engine or other logic to process network maintenance data packets, and a filter to classify data packets. The filter may classify a received data packet having an associated data type and an associated destination by data type and destination. The data packet may be sent to the micro-engine if the data type and destination of the packet may be processed by the micro-engine.

摘要翻译： 方法和系统可以通过网络设备提供功耗降低。 网络上的设备及其组件各自可以在低功率状态和高功率状态下工作。 设备可以包括运行应用的主机和网络控制器以与网络接口。 网络控制器可以包括与主机接口的主机接口逻辑，用于处理网络维护数据分组的微引擎或其他逻辑，以及对数据分组进行分类的过滤器。 过滤器可以通过数据类型和目的地对具有相关联的数据类型和相关联的目的地的接收数据分组进行分类。 如果分组的数据类型和目的地可以由微引擎处理，则数据分组可以被发送到微引擎。

公开(公告)号：US20080209020A1

公开(公告)日：2008-08-28

申请号：US11678183

申请日：2007-02-23

申请人： Aviad Wertheimer

发明人： Aviad Wertheimer

IPC分类号： G06F15/16

CPC分类号： H04L43/0817 ,  H04L29/06 ,  H04L43/00

摘要： A dynamic power management technique to optimize the performance to a pre-defined power or temperature limit. A computing system may comprise a performance management unit that may reconfigure the performance parameters, dynamically, based on the pre-defined power or temperature limit. Such an approach may provide performance enhancements as the power consumed by various components of the computing system may be reduced.

摘要翻译： 动态电源管理技术，将性能优化到预定义的功率或温度限制。 计算系统可以包括可以基于预定义的功率或温度限制来动态地重新配置性能参数的性能管理单元。 这样的方法可以提供性能增强，因为可以减少计算系统的各种组件所消耗的功率。

公开(公告)号：US08898497B2

公开(公告)日：2014-11-25

申请号：US13489434

申请日：2012-06-05

申请人： Aviad Wertheimer ,  Robert Hays

发明人： Aviad Wertheimer ,  Robert Hays

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/3209 ,  Y02D30/30

摘要： Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.

摘要翻译： 包括从链路伙伴接收指定链路伙伴接收唤醒时间的消息并且解析为所接收的链路伙伴的较小者接收唤醒时间和本地发送唤醒时间。

公开(公告)号：US09774536B2

公开(公告)日：2017-09-26

申请号：US13994159

申请日：2011-11-15

申请人： Eliel Louzoun ,  Liron Elmaleh ,  Aviad Wertheimer

发明人： Eliel Louzoun ,  Liron Elmaleh ,  Aviad Wertheimer

IPC分类号： H04L12/26 ,  G06F13/36 ,  H03M13/00 ,  H04L12/803 ,  H04L12/12 ,  H04L12/825 ,  H04L12/801

CPC分类号： H04L47/125 ,  H04L12/12 ,  H04L47/13 ,  H04L47/266 ,  H04L47/29 ,  Y02D50/10 ,  Y02D50/40 ,  Y02D50/42

摘要： Generally, this disclosure describes techniques for buffer management based on link status. A host platform may include a Baseboard Management Controller (BMC) and a network controller that includes a buffer used by the BMC. When a network controller is in a lower power link state, the BMC may attempt to send data to the link partner which causes the network controller to transition out of the low power state. However, this transition may take longer than the buffer's ability to buffer the incoming flow from the BMC. Accordingly, to avoid the need for larger buffer space, a buffer manager is used to provide flow control management of the buffer based on link status.

公开(公告)号：US20140301198A1

公开(公告)日：2014-10-09

申请号：US13994159

申请日：2011-11-15

申请人： Eliel Louzoun ,  Liron Elmaleh ,  Aviad Wertheimer

发明人： Eliel Louzoun ,  Liron Elmaleh ,  Aviad Wertheimer

IPC分类号： H04L12/803 ,  H04L12/801

CPC分类号： H04L47/125 ,  H04L12/12 ,  H04L47/13 ,  H04L47/266 ,  H04L47/29 ,  Y02D50/10 ,  Y02D50/40 ,  Y02D50/42

摘要： Generally, this disclosure describes techniques for buffer management based on link status. A host platform may include a Baseboard Management Controller (BMC) and a network controller that includes a buffer used by the BMC. When a network controller is in a lower power link state, the BMC may attempt to send data to the link partner which causes the network controller to transition out of the low power state. However, this transition may take longer than the buffer's ability to buffer the incoming flow from the BMC. Accordingly, to avoid the need for larger buffer space, a buffer manager is used to provide flow control management of the buffer based on link status.

摘要翻译： 通常，本公开描述了基于链路状态的缓冲器管理技术。 主机平台可以包括基板管理控制器（BMC）和包括由BMC使用的缓冲器的网络控制器。 当网络控制器处于较低功率链路状态时，BMC可以尝试向链路伙伴发送数据，导致网络控制器转换到低功率状态。 但是，这种转换可能比缓冲区缓冲来自BMC的流量的能力需要更长的时间。 因此，为了避免需要较大的缓冲区空间，缓冲管理器用于基于链路状态提供缓冲器的流控制管理。

公开(公告)号：US20130007480A1

公开(公告)日：2013-01-03

申请号：US13489434

申请日：2012-06-05

申请人： Aviad Wertheimer ,  Robert Hays

发明人： Aviad Wertheimer ,  Robert Hays

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G06F1/3209 ,  Y02D30/30

摘要： Includes receiving, from a link partner, a message specifying a link partner receive wake time and resolving to the lesser of the received link partner receive wake time and a local transmit wake time.