摘要:
A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.
摘要:
A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.
摘要:
A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.
摘要:
A system is provided for detecting the condition of a lamp, activating a permanent memory two-state display of the lamp condition, and displaying said condition during the daylight when no power is connected to the lamp. The system includes an electrical circuit powered by electricity drawn from power lines connected to the lamp such that the circuit is energized only when the lamp is supposed to be lighted. A rectifier transforms the alternating current of the power lines into a direct current for the circuit. The current of the power lines connected to the lamp is detected and measured when the lamp is supposed to be lighted in order to determine the condition of the lamp, and provide an appropriate signal for controlling switches within the circuit. Two alternative current pathways, each including a capacitor and a switch responsive to input from the current sensor, are provided in the circuit. When the circuit is energized, current flows through one pathway if the lamp is in working order, and through another if the lamp is sensed as being defective. The capacitor in the portion of the circuit being energized at any given time is periodically discharged to activate an electromagnet capable of changing the state of the display. Discharge of the capacitor is controlled by a free-run pulse generator which provides input to a third switch provided in the circuit.
摘要:
The detecting circuit is used on cars to indicate the presence of emergency vehicles utilizing wailing sirens the instant invention residing in the unique circuitry itself to result in an extremely inexpensive electronics package for carrying out the desired function. Essentially, the circuit utilizes a band pass filter having a voltage tunable center frequency. Dominant frequencies in a sound spectrum received through the band pass filter are converted to voltages by means of a frequency to voltage converter and fed back to the band pass filter to shift the center frequency of the filter thereby tracking the dominant frequency signal. When the dominant frequency results from a wailing siren, the fed back voltage from the frequency to voltage converter constitutes a slowly continuously varying AC signal corresponding to the pitch variation of the siren. This signal is detected by a low pass filter and differentiating circuit to operate a flasher to indicate the presence of the siren. When the dominant frequency results from noise or steady state sounds or the like resulting in a random shifting of the center frequency of the band pass filter, further filter and integrating means responsive to such random signals generate an inhibiting signal preventing spurious operation of the flasher.
摘要:
A photonic integrated circuit having a plurality of circuit components, is disclosed, which may include an MMI for splitting signal power passing therethrough among first and second optical pathways coupled to first and second outputs, respectively, of the MMI, thereby directing first and second percentages of the signal power along the first and the second optical pathways, respectively; and a photodetector integrated into the photonic integrated circuit and coupled to said first optical pathway for measuring a signal power level on said first optical pathway.
摘要:
A method and apparatus for a tunable optical spectrum analyzer that can measure the optical spectrum of a demultiplexed DWDM signal are presented. The signal level and Optical Signal to Noise Ratio (OSNR) of an individual channel of the DWDM signal can be obtained from the measured optical spectrum. The device employs a rapid tuning and detection technique to obtain the optical spectrum of the incoming signal. In a preferred embodiment the apparatus is fabricated on a single chip resulting in a compact measurement device. Using the device of the preferred embodiment, single channel OSNR can be determined in as small a time interval as approximately 225 microseconds. Using an array of these devices an entire DWDM mixed signal can be monitored as to OP and OSNR in the same time interval.
摘要:
A method and circuit are presented for the all optical recovery of the clock signal from an arbitrary optical data signal. The method involves two stages. A first stage preprocesses the optical signal by converting a NRZ signal to a PRZ signal, or if the input optical signal is RZ, by merely amplifying it. In a preferred embodiment this stage is implemented via an integrated SOA in each arm of an asymmetric interferometric device. The output of the preprocessing stage is fed to a clock recovery stage, which consists of a symmetric interferometer that locks on to the inherent clock signal by using the second stage input signal to trigger two optical sources to self oscillate at the clock rate. In a preferred embodiment the second stage is implemented via SOAs integrated in the arms of an interferometer, with two DFB lasers as terminuses. The output of the interferometer is an optical clock signal at the clock rate of the original input.
摘要:
Method and apparatus are presented for the generation and detection of maintenance signals in an optical data network. The maintenance signals are such that they can be read both by high bit-rate and low bit-rate receivers. Detection of the maintenance signals occurs in two stages. In a low bit-rate first stage each nodal input port is sampled in a round robin fashion to detect the presence of a maintenance signal. In a high bit-rate second stage the maintenance signal is verified and read by a high speed receiver, along with other high bit-rate information transmitted with it. One second stage high speed receiver is shared among M input channels for cost and circuit efficiency.
摘要:
A robust nonblocking switch architecture is presented, in the first and final stages made of switch modules which have extra, unallocated, input and output ports beyond those necessary to render the switch architecture nonblocking. Each middle stage has an extra switch module, affording it spare unallocated ports as well. A method of isolating a fault is also presented, given the robust switching architecture. Operating on each stage one at a time, the switching architecture is reconnected so as to bypass either the input, the output, or both the input and the output ports of the switch module in such stage impacted in the faulted signal path. Such method allows the isolation of the faulty switch module, and can be done automatically, with either external apparatus, or integrated fault isolation equipment.