公开(公告)号：US20080175328A1

公开(公告)日：2008-07-24

申请号：US11625859

申请日：2007-01-23

Applicant: Che-Li Lin ,  Shun-An Yang

Inventor： Che-Li Lin ,  Shun-An Yang

IPC: H04L23/02 ,  H03K5/159

CPC classification number: H04L25/022 ,  H04L5/0048 ,  H04L25/0232 ,  H04L2025/03414

Abstract: A multi-path receiving system is provided. The multi-path receiving system includes a multi-path analyzer, a channel estimator and an equalizer. The multi-path analyzer analyzes a channel impulse response (CIR) of the multi-path channel from the received stream. The channel estimator calculates a channel estimation result from the received stream. The channel estimator comprises a frequency domain interpolation filter performing channel estimation. The frequency domain interpolation filter consumes an amount of power according to the CIR result output from the multi-path analyzer. The equalizer equalizes the received stream based on the channel estimation result.

Abstract translation: 提供多路径接收系统。 多路径接收系统包括多径分析器，信道估计器和均衡器。 多路径分析器从接收的流分析多路径信道的信道脉冲响应（CIR）。 信道估计器从接收的流计算信道估计结果。 信道估计器包括执行信道估计的频域内插滤波器。 频域插值滤波器根据多径分析仪输出的CIR结果消耗一定的功率。 均衡器基于信道估计结果对接收的流进行均衡。

公开(公告)号：US07283578B2

公开(公告)日：2007-10-16

申请号：US10377453

申请日：2003-02-28

Applicant: Che-Li Lin ,  Sheng-Jie Chen

Inventor： Che-Li Lin ,  Sheng-Jie Chen

IPC: H04B1/69 ,  H04B1/707 ,  H04B1/713

CPC classification number: H04B1/70755 ,  H04B1/7113 ,  H04B1/7115 ,  H04B1/7117 ,  H04B1/712

Abstract: This present invention is a system and method to adjust a searcher threshold parameter of a RAKE receiver. The adjusting system includes a searcher, a power estimator, and a parameter control apparatus. When the searcher finds and acquires a new path signal, the power estimator will estimate the power of the new path signal and that of the other path signals. The parameter control apparatus will calculate and monitor the power ratio corresponding to the new path signal. If the power ratio remains smaller than a predetermined power ratio parameter for a first predetermined times, the parameter control apparatus will increase the value of the threshold parameter. If the power ratio remains unchanged for a second predetermined times, the parameter control apparatus will lower the value of the threshold parameter. After that, the searcher will acquire the path signals among the multipath signal being searched in accordance with the adjusted threshold parameter. With this adjusted threshold parameter, the present invention can improve the sensitivity of the searcher, acquire the correct path signals in various environments, and provide the correct position of the path signal to the RAKE receiver.

Abstract translation: 本发明是一种调整RAKE接收机的搜索者阈值参数的系统和方法。 调整系统包括搜索器，功率估计器和参数控制装置。 当搜索者发现并获取新的路径信号时，功率估计器将估计新路径信号的功率和其他路径信号的功率。 参数控制装置将计算并监视与新路径信号对应的功率比。 如果第一预定次数的功率比保持小于预定功率比参数，则参数控制装置将增加阈值参数的值。 如果功率比在第二预定时间内保持不变，则参数控制装置将降低阈值参数的值。 之后，搜索器将根据调整后的阈值参数获得被搜索的多径信号之间的路径信号。 利用该调整后的阈值参数，本发明可以提高搜索者的灵敏度，在各种环境中获取正确的路径信号，并将路径信号的正确位置提供给RAKE接收机。

公开(公告)号：US07254163B2

公开(公告)日：2007-08-07

申请号：US10707663

申请日：2003-12-31

Applicant: Sheng-Jie Chen ,  Che-Li Lin

Inventor： Sheng-Jie Chen ,  Che-Li Lin

IPC: H04B1/00 ,  H04J3/06

CPC classification number: H04B1/70775 ,  H04B1/70735 ,  H04B1/7083 ,  H04B1/709

Abstract: A method for performing frame synchronization in a WCDMA system includes first, correlating a received signal with a plurality of predetermined correlators to obtain a plurality of frame synchronization correlation results, then, coherently combining frame synchronization correlation results with a slot synchronization phase when a test phase difference is less than a threshold phase difference, or, coherently combining frame synchronization correlation results with a linear combination of slot synchronization phases when the test phase difference is greater than or equal to the threshold phase difference. The slot synchronization phase is determined by correlating the received signal with a slot synchronization sequence. Lastly, the method determines a frame boundary of the received signal based on the coherent combination results. The method accommodates for a changing signal to noise ratio to improve frame synchronization speed and accuracy.

Abstract translation: 一种用于在WCDMA系统中执行帧同步的方法包括首先将接收信号与多个预定相关器相关联以获得多个帧同步相关结果，然后在测试阶段相干地将帧同步相关结果与时隙同步相结合 差值小于阈值相位差，或者当测试相位差大于或等于阈值相位差时，将帧同步相关结果与时隙同步相位的线性组合相干组合。 通过将接收的信号与时隙同步序列相关联来确定时隙同步相位。 最后，该方法基于相干组合结果确定接收信号的帧边界。 该方法适应变化的信噪比，从而提高帧同步速度和精度。

公开(公告)号：US07200133B2

公开(公告)日：2007-04-03

申请号：US10285435

申请日：2002-11-01

Applicant: Che-Li Lin

Inventor： Che-Li Lin

IPC: H04B7/216

CPC classification number: H04B1/7085 ,  H04B1/7117 ,  H04B2201/7071

Abstract: A rake finger receiver and control method therefor, for use in a wireless spread communication system. The rake finger receiver includes a multiplexer, a searcher, a first switch fabric, a rake fingers and tracking pool, a second switch fabric, a combiner, a decoder, a channel estimator, and a rake finger controller. One searcher is used to serve multiple antennas of a base station so as to reduce the system complexity. The number of the rake fingers assigned for processing multipath components associated with a radio link is determined dynamically. Thus, the resource is utilized efficiently.

Abstract translation: 一种用于无线传播通信系统的耙指接收机及其控制方法。 耙指接收器包括多路复用器，搜索器，第一交换结构，耙指和跟踪池，第二交换结构，组合器，解码器，信道估计器和耙指控制器。 一个搜索器用于服务于基站的多个天线，以便降低系统的复杂度。 分配用于处理与无线电链路相关联的多路径分量的耙指的数量被动态地确定。 因此，资源被有效利用。

公开(公告)号：US20070030913A1

公开(公告)日：2007-02-08

申请号：US11196353

申请日：2005-08-04

Applicant: Che-Li Lin

Inventor： Che-Li Lin

IPC: H04K1/10

CPC classification number: H04L27/2647 ,  H04L1/0047 ,  H04L1/0065 ,  H04L1/0071 ,  H04L25/0204

Abstract: An orthogonal frequency-division multiplexing (OFDM) receiver that has a capability for canceling impulse interference is introduced in the present invention. The OFDM receiver includes an impulse noise remover for receiving incoming signals and canceling the impulse interference and a demodulator to demodulate the incoming signals. The impulse noise remover includes an analog-to-digital converter (ADC) that converts the incoming signals into multiple signal points, a delay line for temporarily storing the signal points, a signal processor for calculating a summation of a number of the signals points, a thresholder for checking if an input level provided by the signal processor according to the summation is greater than a predetermined threshold and a switch for replacing values of the signal points influenced by the impulse interference by zeros if the input level is greater than the predetermined threshold.

Abstract translation: 在本发明中引入了具有消除脉冲干扰能力的正交频分复用（OFDM）接收机。 OFDM接收机包括用于接收输入信号并消除脉冲干扰的脉冲噪声去除器和解调器来解调输入信号。 脉冲噪声去除器包括将输入信号转换成多个信号点的模数转换器（ADC），用于临时存储信号点的延迟线，用于计算多个信号点的求和的信号处理器， 用于检查由信号处理器提供的根据求和的输入电平是否大于预定阈值的阈值，以及用于如果输入电平大于预定阈值，用于替换受脉冲干扰影响的信号点的值的开关 。

公开(公告)号：US20070013640A1

公开(公告)日：2007-01-18

申请号：US11162837

申请日：2005-09-26

Applicant: Che-Li Lin ,  Chang-San Chen

Inventor： Che-Li Lin ,  Chang-San Chen

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G2310/0289 ,  G09G2330/021

Abstract: A data switching circuit is provided, which reduces power consumption of the source drivers when used together with a dot inversion driving method. The circuit comprises a control unit and a switching unit. Wherein, the control unit provides a switching signal. The switching unit has 2N input terminals and 2N output terminals and receives the switching signal. Assume that N is a positive integer and 1≦i≦N. When the switching signal is in a first state, the switching unit connects the (2i−1)th input terminal and the (2i−1)th output terminal, and connects the 2ith input terminal and the 2ith output terminal. When the switching signal is in a second state, the switching unit connects the 2ith input terminal and the (2i−1)th output terminal, and connects the (2i−1)th input terminal and the 2ith output terminal.

Abstract translation: 提供数据切换电路，当与点反转驱动方法一起使用时，其降低了源极驱动器的功耗。 电路包括控制单元和开关单元。 其中，控制单元提供切换信号。 开关单元具有2N个输入端子和2N个输出端子，并接收开关信号。 假设N是正整数，1 <= i <= N。 当切换信号处于第一状态时，切换单元连接（2i-1）^{输入端子和（2i-1）输出端子，并连接 2i 输入端子和第2i 输出端子。 当切换信号处于第二状态时，切换单元连接第2i 输入端和（2i-1）输出端，并将（2i- 1）输入端子和第2i 输出端子。}

公开(公告)号：US20050253824A1

公开(公告)日：2005-11-17

申请号：US10710404

申请日：2004-07-08

Applicant: Che-Li Lin

Inventor： Che-Li Lin

IPC: G02F1/133 ,  G09F9/30 ,  G09G3/00 ,  G09G3/20 ,  G09G3/36 ,  G09G5/00

CPC classification number: G09G3/3611 ,  G09G3/2096

Abstract: A serial-protocol type panel display system is suitable for use in a panel display apparatus. The panel display system includes a pixel-array display unit. Multiple divers are used to drive the pixel-array display unit to display an image. A VGA unit uses a serial protocol for encoding and exports a serial image display signal and a clock signal to the drivers. Wherein, the drivers decode the serial image display signal to obtain multiple desired displaying signals to drive the pixels of the pixel-array display unit.

Abstract translation: 串行协议型面板显示系统适用于面板显示装置。 面板显示系统包括像素阵列显示单元。 多个潜水员用于驱动像素阵列显示单元显示图像。 VGA单元使用串行协议进行编码并将串行图像显示信号和时钟信号输出到驱动器。 其中，驱动器解码串行图像显示信号以获得多个期望的显示信号以驱动像素阵列显示单元的像素。

公开(公告)号：US20050200615A1

公开(公告)日：2005-09-15

申请号：US10709467

申请日：2004-05-07

Applicant: Che-Li Lin

Inventor： Che-Li Lin

IPC: G02F1/133 ,  G09G3/20 ,  G09G3/36

CPC classification number: G09G3/2003 ,  G09G2310/027 ,  G09G2320/0666 ,  G09G2370/08

Abstract: A color management structure for a panel display is provided. It comprises: a display array unit; a plurality of gate drivers; a plurality of source drivers, the plurality of gate drivers and the plurality of source drivers driving the display array unit to display an image; and a timing sequence control unit, the timing sequence control unit outputting a plurality of signals to the plurality of gate drivers and the plurality of source drivers to drive the display array unit, the timing sequence control unit outputting a clock signal and a color management data to the plurality of source drivers.

Abstract translation: 提供了面板显示器的颜色管理结构。 它包括：显示阵列单元; 多个门驱动器; 多个源极驱动器，所述多个栅极驱动器和所述多个源极驱动器驱动所述显示器阵列单元以显示图像; 以及定时序列控制单元，所述定时序列控制单元向所述多个栅极驱动器和所述多个源极驱动器输出多个信号以驱动所述显示阵列单元，所述定时序列控制单元输出时钟信号和颜色管理数据 到多个源驱动器。

公开(公告)号：US20050147157A1

公开(公告)日：2005-07-07

申请号：US10707663

申请日：2003-12-31

Applicant: Sheng-Jie Chen ,  Che-Li Lin

Inventor： Sheng-Jie Chen ,  Che-Li Lin

IPC: H04B1/707 ,  H04B1/69

CPC classification number: H04B1/70775 ,  H04B1/70735 ,  H04B1/7083 ,  H04B1/709

Abstract: A method for performing frame synchronization in a WCDMA system includes first, correlating a received signal with a plurality of predetermined correlators to obtain a plurality of frame synchronization correlation results, then, coherently combining frame synchronization correlation results with a slot synchronization phase when a test phase difference is less than a threshold phase difference, or, coherently combining frame synchronization correlation results with a linear combination of slot synchronization phases when the test phase difference is greater than or equal to the threshold phase difference. The slot synchronization phase is determined by correlating the received signal with a slot synchronization sequence. Lastly, the method determines a frame boundary of the received signal based on the coherent combination results. The method accommodates for a changing signal to noise ratio to improve frame synchronization speed and accuracy.

Abstract translation: 一种用于在WCDMA系统中执行帧同步的方法包括首先将接收信号与多个预定相关器相关联以获得多个帧同步相关结果，然后在测试阶段相干地将帧同步相关结果与时隙同步相结合 差值小于阈值相位差，或者当测试相位差大于或等于阈值相位差时，将帧同步相关结果与时隙同步相位的线性组合相干组合。 通过将接收的信号与时隙同步序列相关联来确定时隙同步相位。 最后，该方法基于相干组合结果确定接收信号的帧边界。 该方法适应变化的信噪比，从而提高帧同步速度和精度。

公开(公告)号：US08225166B2

公开(公告)日：2012-07-17

申请号：US12368182

申请日：2009-02-09

Applicant: Shun-An Yang ,  Che-Li Lin

Inventor： Shun-An Yang ,  Che-Li Lin

IPC: H03M13/00

CPC classification number: H03M13/3738 ,  H03M13/1165 ,  H03M13/15 ,  H03M13/152 ,  H03M13/2906 ,  H04H60/11 ,  H04L1/0057 ,  H04L1/0065 ,  H04L2001/0093

Abstract: A signal processing apparatus is provided. The signal processing apparatus includes an inner-code decoder, an outer-code decoder, and an error detection unit. The inner-code decoder decodes an input data stream to generate a first output data stream, wherein the input data stream is coded using a concatenated coding scheme including an outer coding and an inner coding. The outer-code decoder decodes the first output data stream to generate a second output data stream. The error detection unit performs an error detection upon the second output data stream to generate an error detection result. The decision logic sets error indication information of the second output data stream according to at least the error detection result.

Abstract translation: 提供一种信号处理装置。 信号处理装置包括内码解码器，外码解码器和错误检测单元。 内码解码器解码输入数据流以产生第一输出数据流，其中使用包括外部编码和内部编码的级联编码方案对输入数据流进行编码。 外码解码器解码第一输出数据流以产生第二输出数据流。 错误检测单元对第二输出数据流执行错误检测以产生错误检测结果。 决定逻辑至少根据错误检测结果来设定第二输出数据流的错误指示信息。