公开(公告)号：US06734090B2

公开(公告)日：2004-05-11

申请号：US10078861

申请日：2002-02-20

Applicant: Birendra N. Agarwala ,  Hormazdyar Minocher Dalal ,  Eric G. Liniger ,  Diana Llera-Hurlburt ,  Du Binh Nguyen ,  Richard W. Procter ,  Hazara Singh Rathore ,  Chunyan E. Tian ,  Brett H. Engel

Inventor： Birendra N. Agarwala ,  Hormazdyar Minocher Dalal ,  Eric G. Liniger ,  Diana Llera-Hurlburt ,  Du Binh Nguyen ,  Richard W. Procter ,  Hazara Singh Rathore ,  Chunyan E. Tian ,  Brett H. Engel

IPC: H01L2144

CPC classification number: H01L21/76831 ,  H01L21/76801 ,  H01L21/76807

Abstract: An edge seal around the periphery of an integrated circuit device which environmentally protects the copper circuitry from cracks that may form in the low-k interlevel dielectric during dicing. The edge seal essentially constitutes a dielectric wall between the copper circuitry and the low-k interlevel dielectric near the periphery of the integrated circuit device. The dielectric wall is of a different material than the low-k interlevel dielectric.

Abstract translation: 围绕集成电路器件周边的边缘密封，其环境地保护铜电路免受在切割期间可能在低k层间电介质中形成的裂纹。 边缘密封件基本上构成在集成电路器件周边附近的铜电路和低k层间电介质之间的电介质壁。 电介质壁是与低k层间电介质不同的材料。

公开(公告)号：US5760595A

公开(公告)日：1998-06-02

申请号：US715942

申请日：1996-09-19

Applicant: Robert Daniel Edwards ,  Du Binh Nguyen ,  James Joseph Poulin ,  Hazara Singh Rathore ,  Richard George Smith

Inventor： Robert Daniel Edwards ,  Du Binh Nguyen ,  James Joseph Poulin ,  Hazara Singh Rathore ,  Richard George Smith

IPC: G01R31/04 ,  G01R31/28 ,  G01R31/02

CPC classification number: G01R31/2863 ,  G01R31/045

Abstract: A test socket is provided as part of a high temperature electromigration test system to allow the prediction of median time to failure to temperatures in excess of 450.degree. C. of VSLI interconnects.

Abstract translation: 提供测试插座作为高温电迁移测试系统的一部分，以允许将中值时间预测为VSLI互连超过450℃的温度。