Abstract:
An apparatus and method for frequency synthesis using a Delay Locked Loop (DLL) are provided. The apparatus includes the DLL, an edge pulse generator, and an inductive-capacitive (LC) tank switch. If phases of a reference frequency signal and a feedback signal are the same and thus are locked, the DLL delays the reference frequency signal. The edge pulse generator generates a plurality of pulse signals representing phase delay amounts of signals. The LC tank switch combines the plurality of pulse signals and generates frequency.
Abstract:
A frequency synthesizing apparatus and method for a multi-band radio frequency (RF) receiver is provided. The frequency synthesizing apparatus includes a simple circuit configuration with a single SSB mixer and thus, may synthesize six high frequency signals. Signals to be inputted into the SSB mixer include a first signal and a second signal. The first signal is generated based on a VCO and a PPF. Also, the second signal is selected from a plurality of frequency divided signals which are generated by dividing a signal generated in the VCO via a plurality of dividers.
Abstract:
A multiband RF transmitting and receiving apparatus and a method therefore is capable of using a control voltage from a phase locked loop (PLL) to control other components, as well as a voltage controlled oscillator (VCO), of a multiband RF transceiver. The multiband transmitting and receiving apparatus adjusts a capacitance value of a varactor in a power amplifier (PA) and a low noise amplifier (LNA) including an LC parallel resonance circuit, respectively, using the control voltage from the PLL and controls a current flowing to a mixer. Accordingly, the components in the multiband RF transceiver are able to operate a greater number of frequency bands than a single frequency band, thereby reducing the number of components required to design the multiband RF transceiver.
Abstract:
A receiver includes first switches for applying either differential signals of an oscillator or a data signal of a transmitter to down-converting mixers; a frequency conversion unit for mixing and applying to the down-converting mixers quadrature signals generated from an arbitrary clock signal generator and the oscillator, and having a PPF for changing a phase difference of I/Q signals according to a control voltage externally applied; a phase difference detection part for checking a phase difference between the I/Q signals and generating the control voltage to be applied to the PPF according to the phase difference so as to correct the phase difference; third switches for applying the data signal processed through the down-converting mixers, filters, and amplifiers to A/D converters and applying the I/Q signals having a predetermined frequency to the phase difference detection part; and a control unit for switching the first and third switches.
Abstract:
A digital-to-analog converter converts a digital input signal into an analog signal. The digital-to-analog converter includes: a power-supply unit for outputting voltages of different magnitudes through plural output terminals thereof; plural switches connected to the plural output terminals, which are controlled on and off, and are for applying the output voltages of the power-supply unit or a ground voltage to a next stage; and plural source transistors connected to the plural switches for outputting currents of magnitudes corresponding to the voltages applied from the respective connected switches of the plural switches. The plural source transistors are designed to have the same operating characteristics, thereby improving glitch characteristics.
Abstract:
A high-capacitance capacitor having a multi-layered vertical structure for use in an RF circuit is disclosed. The capacitor includes an upper electrode, a lower electrode, and a dielectric layer interposed between the two electrodes. A plurality of electrodes is formed in parallel in the dielectric layer in a diagonal direction. First electrodes, which are half of the plurality of electrodes, are coupled to only the upper electrode, while second electrodes, which are the other half of the plurality of electrodes, are coupled to only the lower electrode. The first electrodes and the second electrodes are alternately positioned in rows and columns. The capacitor does not require additional processes, thereby reducing complexity and cost of fabrication thereof.
Abstract:
An apparatus and a method for increasing Error Vector Magnitude (EVM) performance representing quality of transmission signal are provided. The apparatus and the method suppress an image frequency component generated due to mismatch of IQ channels in order to transmit/receive a large amount of data without distortion in 4th generation wireless communication standard candidate technologies such as a Long Term Evolution (LTE) system and a mobile WiMax system. The apparatus includes a LOcal frequency (LO) buffer including an amplifier. The LO buffer controls the gain and the phase of the amplifier using a control bit for controlling resistor connection.
Abstract:
A receiver apparatus for tracking and rejecting a Transmit (Tx) signal in a wireless communication system and an operation method thereof are provided. The receiver apparatus includes a controller for receiving channel frequency information of the Tx signal and for controlling an operation for tracking and rejecting a frequency of the Tx signal; a phase locked loop for generating an oscillation frequency by generating a control voltage according to the channel frequency information of the Tx signal under the control of the controller and for filtering a signal corresponding to the oscillation frequency among signals input to a low noise amplifier; and the low noise amplifier for amplifying power while minimizing noise of a signal filtered by the phase locked loop.