公开(公告)号：US07172948B2

公开(公告)日：2007-02-06

申请号：US10761657

申请日：2004-01-20

Applicant: Chin-Kun Fang ,  Kun-Pi Cheng ,  Wei-Jen Wu ,  Ching-Jiunn Huang ,  Chung-Jen Chen

Inventor： Chin-Kun Fang ,  Kun-Pi Cheng ,  Wei-Jen Wu ,  Ching-Jiunn Huang ,  Chung-Jen Chen

IPC: H01L21/76

CPC classification number: H01L21/76229 ,  H01L23/544 ,  H01L2223/54493 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: A semiconductor process wafer having substantially co-planar active areas and a laser marked area in an adjacent inactive area and method for forming the same to eliminate a step height and improve a subsequent patterning process over the active areas wherein an inactive area trench is formed overlying the laser marked area in parallel with formation of STI trenches in the active area whereby the active areas and the inactive area are formed substantially co-planar without a step height.

Abstract translation: 具有相邻非活性区域中基本上共平面的有源区和激光标记区的半导体工艺晶片及其形成方法以消除台阶高度并改善在有源区上的后续图案化工艺，其中形成无效区沟槽 激光标记区域与有源区域中的STI沟槽的形成平行，由此有源区域和非活性区域形成为基本上没有台阶高度共面。

公开(公告)号：US20050071033A1

公开(公告)日：2005-03-31

申请号：US10672394

申请日：2003-09-26

Applicant: Kun-Pi Cheng ,  Hsin-Yuan Chen ,  Yo-Nien Lin ,  Feng-Cheng Chung

Inventor： Kun-Pi Cheng ,  Hsin-Yuan Chen ,  Yo-Nien Lin ,  Feng-Cheng Chung

IPC: G06F19/00

CPC classification number: G03F7/70633 ,  G03F7/70525

Abstract: An automatic method to maintain and correct overlay in the fabrication of integrated circuits is described. An overlay control table is automatically generated for lots run through a process tool. An overlay correction is calculated from the overlay control table and sent to the process tool for real-time or manual overlay correction.

Abstract translation: 描述了在集成电路的制造中维护和校正覆盖的自动方法。 自动生成覆盖控制表，用于批处理工具。 从覆盖控制表计算覆盖校正，并发送到过程工具进行实时或手动叠加校正。