Portable charging system
    11.
    发明申请
    Portable charging system 审中-公开
    便携式充电系统

    公开(公告)号:US20060170392A1

    公开(公告)日:2006-08-03

    申请号:US11043982

    申请日:2005-01-28

    CPC classification number: H02J7/0054 H02J7/0029 H02J2007/006

    Abstract: A portable charging system capable of improving the traditional charging structure and technology uses a programmable function and a controller memory method in a charging and discharging system, which can simultaneously charge and discharge the charger of a mobile electronic device or the charger of the charging system itself, or continue supplying the existing battery power in the original circuit to a mobile electronic device. The portable charging system has a mobile electronic device charging output port, a power input port, a program update input port, a chargeable/dischargeable battery, and a main system printed circuit board. The foregoing mobile electronic device charging output port, power input port and program update input port has the following circuit modules: a charging/discharging interface module, a charging module, a discharging module, a battery control interface module and a control module.

    Abstract translation: 能够改善传统充电结构和技术的便携式充电系统在充电和放电系统中使用可编程功能和控制器存储方法,其可以同时对移动电子设备的充电器或充电系统本身的充电器进行充电和放电 ,或者继续将原始电路中的现有电池电力提供给移动电子设备。 便携式充电系统具有移动电子装置充电输出端口,电源输入端口,程序更新输入端口,可充电/可放电电池和主系统印刷电路板。 上述移动电子设备充电输出端口,电源输入端口和程序更新输入端口具有以下电路模块:充电/放电接口模块,充电模块,放电模块,电池控制接口模块和控制模块。

    Collapsible stoking apparatus
    12.
    发明授权

    公开(公告)号:US10441109B2

    公开(公告)日:2019-10-15

    申请号:US15299082

    申请日:2016-10-20

    Applicant: Kuo-Chan Huang

    Inventor: Kuo-Chan Huang

    Abstract: A stoking apparatus includes two concealable panels, a bent covering panel and a flat covering panel. The concealable panels are pivotally connected to each other. The bent covering panel includes a major portion and a minor portion, with an angle between the major and minor portions. The major portion is pivotally connected to one of the concealable panels. The minor portion is pivotally connected to the flat covering panel. The flat covering panel is further pivotally connected to the other concealable panel. The minor portion provides a gap between the major portion and the flat covering panel to receive the first and second concealable panels when the collapsible stoking apparatus is in a collapsed position.

    COLLAPSIBLE WINDSHIELD
    13.
    发明申请

    公开(公告)号:US20180112883A1

    公开(公告)日:2018-04-26

    申请号:US15299212

    申请日:2016-10-20

    Applicant: Kuo-Chan Huang

    Inventor: Kuo-Chan Huang

    CPC classification number: F24C15/28

    Abstract: A collapsible windshield includes arched plates connected to one another by pivot assemblies so that the arched plates can be pivoted relative to one another between an extended position and a collapsed position. Each of the arched plates includes a concave face and a convex face. Only a portion of the convex face of each of the arched plates is placed against a portion of the concave face of another one of the arched plates when the collapsible windshield is in the extended position. The entire convex face of each of the arched plates is placed against the entire concave face of another one of the arched plates when the collapsible windshield is in the collapsed position. A group of the arched plates is directed in a direction. An alternate group of the arched plates is directed in an opposite direction when the collapsible windshield is in the collapsed position.

    Image sensor and fabricating method thereof
    15.
    发明授权
    Image sensor and fabricating method thereof 有权
    图像传感器及其制造方法

    公开(公告)号:US08278132B2

    公开(公告)日:2012-10-02

    申请号:US12781825

    申请日:2010-05-18

    Abstract: The present invention provides an image sensor and a fabricating method thereof capable of approaching higher quantum efficiency and reducing cost. The method comprises: providing a substrate; forming a pixel region on a top surface of the substrate; forming an interlayer insulating layer and at least a metal line on the pixel region; forming an isolation carrier layer having a hole array therein on the interlayer insulating layer; grinding a lower surface of the substrate to reduce the thickness of the substrate; placing a plurality of conductors into the hole array to form a plurality of bumps on the isolation carrier layer.

    Abstract translation: 本发明提供能够接近较高量子效率并降低成本的图像传感器及其制造方法。 该方法包括:提供衬底; 在所述基板的顶表面上形成像素区域; 在所述像素区域上形成层间绝缘层和至少金属线; 在层间绝缘层上形成具有孔阵列的隔离载体层; 研磨衬底的下表面以减小衬底的厚度; 将多个导体放置到孔阵列中以在隔离载体层上形成多个凸起。

    Device for separating synchronous signal and method thereof
    16.
    发明授权
    Device for separating synchronous signal and method thereof 有权
    用于分离同步信号的装置及其方法

    公开(公告)号:US08199254B2

    公开(公告)日:2012-06-12

    申请号:US11896216

    申请日:2007-08-30

    CPC classification number: H04N5/18 H04N5/08

    Abstract: In a device for separating a synchronous signal in a video signal, a capacitor receives the video signal to obtain a coupling signal, a level determining circuit receives the coupling signal and compares a voltage level of the coupling signal with a number of reference voltages. The reference voltages define several reference voltage ranges, one of which is a predetermined reference voltage range. The level determining circuit outputs an adjusting signal according to a reference voltage range corresponding to a minimum voltage level of the coupling signal within a predetermined time period. A level adjusting circuit has several current sources for receiving the adjusting signal and thus controls the current sources to adjust a DC level of the coupling signal. A synchronous signal separating circuit separates the synchronous signal from the coupling signal when the minimum voltage level of the coupling signal is substantially within the predetermined reference voltage range.

    Abstract translation: 在用于分离视频信号中的同步信号的装置中,电容器接收视频信号以获得耦合信号,电平确定电路接收耦合信号并将耦合信号的电压电平与多个参考电压进行比较。 参考电压定义了几个参考电压范围,其中一个参考电压范围是预定的参考电压范围。 电平确定电路根据与预定时间段内的耦合信号的最小电压电平相对应的参考电压范围输出调整信号。 电平调整电路具有几个用于接收调节信号的电流源,从而控制电流源来调节耦合信号的直流电平。 当耦合信号的最小电压电平基本上在预定参考电压范围内时,同步信号分离电路将同步信号与耦合信号分离。

    Input output device for mixed-voltage tolerant
    17.
    发明授权
    Input output device for mixed-voltage tolerant 有权
    输入输出设备,耐混电压

    公开(公告)号:US07812638B2

    公开(公告)日:2010-10-12

    申请号:US12184271

    申请日:2008-08-01

    CPC classification number: H03K19/00315

    Abstract: An input output device coupled between a core circuit and a pad and including an output cell, an input cell, and a pre-driver. The output cell includes an output stage and a voltage level converter. The output stage includes a first transistor and a second transistor connected to the first transistor in serial between a first supply voltage and a second voltage. The voltage level converter generates a first gate voltage to the first transistor according to the first voltage and a data signal. When the first supply voltage is increased, the first gate voltage is increased. When the data signal is at a high level, the first transistor is turned on. The input cell includes a pull unit and a first N-type transistor. The pre-driver turns off the first and the second transistors.

    Abstract translation: 耦合在核心电路和焊盘之间并包括输出单元,输入单元和预驱动器的输入输出设备。 输出单元包括输出级和电压电平转换器。 输出级包括在第一电源电压和第二电压之间串联连接到第一晶体管的第一晶体管和第二晶体管。 电压电平转换器根据第一电压和数据信号产生到第一晶体管的第一栅极电压。 当第一电源电压增加时,第一栅极电压增加。 当数据信号处于高电平时,第一晶体管导通。 输入单元包括拉单元和第一N型晶体管。 预驱动器关闭第一和第二晶体管。

    Method of Controlling Spread-Spectrum Clock Generation
    18.
    发明申请
    Method of Controlling Spread-Spectrum Clock Generation 审中-公开
    控制扩频时钟产生的方法

    公开(公告)号:US20100229019A1

    公开(公告)日:2010-09-09

    申请号:US12397247

    申请日:2009-03-03

    CPC classification number: G06F5/12 G06F2205/061 H04B1/707

    Abstract: A method of controlling spread-spectrum clock generation is disclosed. A first-in first-out (FIFO) buffer is first monitored. When the FIFO buffer is determined to be abnormal, an associated spread-spectrum clock generator (SSCG) is turned off or its spread range is decreased.

    Abstract translation: 公开了一种控制扩频时钟产生的方法。 首先监听先进先出(FIFO)缓冲区。 当FIFO缓冲器被确定为异常时,关联的扩频时钟发生器(SSCG)被关闭或其扩展范围减小。

    Phase-locked loop circuit
    19.
    发明授权
    Phase-locked loop circuit 有权
    锁相环电路

    公开(公告)号:US07786773B2

    公开(公告)日:2010-08-31

    申请号:US12246465

    申请日:2008-10-06

    CPC classification number: H03L7/089 H03L7/091 H03L7/0995 H03L7/18

    Abstract: A phase-locked loop circuit for generating an output signal includes a phase frequency detector (PFD), a processing module, and a clock generator. The PFD is implemented for generating a plurality of indicating signals according to a first reference signal and a feedback signal, where the feedback signal is generated according to the output signal. The processing module is coupled to the PFD, and is implemented for generating a control signal according to the indicating signals and a plurality of clock signals, where the clock signals have an identical frequency but different phases. The clock generator is coupled to the processing module, and is implemented for generating the clock signals according to the control signal. The output signal is generated according to a specific clock signal selected from the clock signals.

    Abstract translation: 用于产生输出信号的锁相环电路包括相位频率检测器(PFD),处理模块和时钟发生器。 PFD被实现为根据第一参考信号和反馈信号产生多个指示信号,其中根据输出信号产生反馈信号。 处理模块耦合到PFD,并被实现用于根据指示信号和多个时钟信号产生控制信号,其中时钟信号具有相同的频率但不同的相位。 时钟发生器耦合到处理模块,并被实现为根据控制信号产生时钟信号。 根据从时钟信号中选择的特定时钟信号产生输出信号。

    COMPARATOR WITH LOW OFFSET VOLTAGE
    20.
    发明申请
    COMPARATOR WITH LOW OFFSET VOLTAGE 有权
    具有低偏置电压的比较器

    公开(公告)号:US20080315924A1

    公开(公告)日:2008-12-25

    申请号:US11767283

    申请日:2007-06-22

    CPC classification number: H03K3/356113 H03K3/356121

    Abstract: A differential comparator is provided. The comparator receiving two differential signals and generating a comparison result represented by an output signal on one of two output terminals respectively on two current paths. The comparator comprises two pairs of latch transistors respectively disposed on the two current paths and two pairs of input transistors respectively disposed on the two current paths, wherein gates of the latch transistors on one of the current paths are commonly coupled to the output terminal between the latch transistors on the other current path, gates of the input transistors on one of the current paths respectively receives an input signal of one of the differential signals and a reference signal of the other differential signal and each of the input transistors is disposed between the output terminal and one of the latch transistors on the current path thereof.

    Abstract translation: 提供差分比较器。 比较器接收两个差分信号,并且分别在两个电流路径上的两个输出端子之一上产生由输出信号表示的比较结果。 比较器包括分别设置在两个电流路径上的两对锁存晶体管和分别设置在两个电流路径上的两对输入晶体管,其中一条电​​流路径上的锁存晶体管的栅极共同耦合到输出端之间 在另一电流路径上的锁存晶体管,其中一条电​​流路径上的输入晶体管的栅极分别接收差分信号之一的输入信号和另一个差分信号的参考信号,并且每个输入晶体管设置在输出 端子和其电流路径上的锁存晶体管中的一个。

Patent Agency Ranking