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    Method for removing sub-micro particles from a wafer surface using high speed mechanical scrubbing
    11.
    发明授权
    Method for removing sub-micro particles from a wafer surface using high speed mechanical scrubbing 失效
    使用高速机械洗涤从晶片表面去除亚微粒子的方法

    公开(公告)号：US5711818A

    公开(公告)日：1998-01-27

    申请号：US651020

    申请日：1996-05-21

    Applicant: Manoj Kumar Jain

    Inventor： Manoj Kumar Jain

    IPC: H01L21/304 ,  B08B1/04 ,  H01L21/00 ,  H01L21/306 ,  B08B7/04

    CPC classification number: H01L21/02052 ,  B08B1/04 ,  H01L21/67046

    Abstract: A method for removing particulate contaminants from a semiconductor wafer is disclosed. A wafer 10 is held in a wafer holder 12 at cleaning station 14. Cleaning station 14 has a rinse fluid supply system 18 which supplies, e.g. deionized water, to the wafer surface during particle removal. A cleaning pad 20 is mounted on a platen 22, substantially in the plane of wafer 10. Platen 22 is coupled to a drive mechanism 24, which may for example be an electric motor, and drive mechanism 24 is coupled to station 14 by an engagement mechanism 26 which provides vertical displacement to engage pad 20 and wafer 10 for particle removal, and also provides a controlled pad contact pressure during particle removal. In operation, rinse fluid from 18 is supplied to slowly rotating wafer 10, while pad 20 is rotated, preferably at 200 to 600 rpm, and contacted with wafer 10. High pad speed appears to be particularly beneficial to cleaning, with pad contact pressure and contact time apparently being secondary effects which at least decrease wafer-to-wafer variances in the cleaning process.

    Abstract translation: 公开了一种从半导体晶片去除微粒污染物的方法。 清洁站14具有清洗流体供应系统18，该清洗流体供应系统18例如提供清洁液体供应系统18。 去离子水，在颗粒去除期间到晶片表面。 清洁垫20安装在台板22上，基本上在晶片10的平面中。台板22联接到驱动机构24，驱动机构24例如可以是电动马达，驱动机构24通过接合 机构26，其提供垂直位移以接合垫20和晶片10用于颗粒去除，并且还在颗粒去除期间提供受控的焊盘接触压力。 在操作中，将来自18的冲洗流体供应到缓慢旋转的晶片10，同时垫20旋转，优选地以200至600rpm旋转，并与晶片10接触。高垫速度对于清洁而言尤其有利，具有垫接触压力和 接触时间显然是二次效应，其至少降低了清洁过程中的晶片到晶片的差异。

    MULTICAST FLOW MONITORING
    14.
    发明申请
    MULTICAST FLOW MONITORING 有权
    多媒体流量监测

    公开(公告)号：US20120155277A1

    公开(公告)日：2012-06-21

    申请号：US13019310

    申请日：2011-02-02

    Applicant: Manoj Kumar JAIN ,  Sanjay Kumar ,  Sumit Kumar ,  Lokesh Chenta

    Inventor： Manoj Kumar JAIN ,  Sanjay Kumar ,  Sumit Kumar ,  Lokesh Chenta

    IPC: H04L12/26

    CPC classification number: H04L12/1863 ,  H04L43/026

    Abstract: Provided is a method of monitoring a multicast flow. An initial multicast flow is characterized as a baseline flow entity. A subsequent multicast flow is compared against the baseline flow entity to identify anomalies between the baseline flow entity and the subsequent multicast flow.

    Abstract translation: 提供了一种监视组播流的方法。 初始多播流被表征为基线流实体。 将后续多播流与基线流实体进行比较，以识别基线流实体与后续多播流之间的异常。

    Enhancement in throughput and planarity during CMP using a dielectric stack containing an HDP oxide
    19.
    发明授权
    Enhancement in throughput and planarity during CMP using a dielectric stack containing an HDP oxide 失效
    使用包含HDP氧化物的电介质堆叠在CMP期间增强吞吐量和平坦度

    公开(公告)号：US06653717B2

    公开(公告)日：2003-11-25

    申请号：US10320968

    申请日：2002-12-17

    Applicant: Manoj Kumar Jain ,  Michael Francis Chisholm

    Inventor： Manoj Kumar Jain ,  Michael Francis Chisholm

    IPC: H01L2978

    CPC classification number: H01L23/528 ,  H01L21/31053 ,  H01L21/76819 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device and process for making the same are disclosed which use reticulated conductors and a width-selective planarizing interlevel dielectric (ILD) deposition process to improve planarity of an interconnect layer. Reticulated conductor 52 is used in place of a solid conductor where the required solid conductor width would be greater than a process and design dependent critcal width (conductors smaller than the critical width may be planarized by an appropriate ILD deposition). The reticulated conductor is preferably formed of integrally-formed conductive segments with widths less than the critical width, such that an ILD 32 formed by a process such as a high density plasma oxide deposition (formed by decomposition of silane in an oxygen-argon atmosphere with a back-sputtering bias) or spin-coating planarizes the larger, reticulated conductor as it would a solid conductor of less than critical width. Using such a technique, subsequent ILD planarization steps by, e.g., chemical mechanic polishing or etchback, may be reduced or avoided entirely.

    Abstract translation: 公开了一种半导体器件及其制造方法，其使用网状导体和宽度选择性平坦化层间电介质（ILD）沉积工艺来改善互连层的平面度。 使用网状导体52代替固体导体，其中所需的固体导体宽度将大于工艺和设计相关的临界宽度（小于临界宽度的导体可以通过适当的ILD沉积而平坦化）。 网状导体优选地由具有小于临界宽度的整体形成的导电段形成，使得通过诸如高密度等离子体氧化物沉积（通过在氧 - 氩气氛中的硅烷分解形成的工艺中形成的）形成的ILD 32， 反溅射偏压）或旋转涂层将较大的网状导体平坦化，因为其将小于临界宽度的固体导体。 使用这种技术，可以完全减少或避免随后的例如化学机械抛光或回蚀的ILD平坦化步骤。

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