摘要:
The present invention provides a transmitter architecture operable to cancel non-data-related direct current (DC) components therein. One method to cancel transmitter non-data-related DC offsets includes generating a baseband digital null signal. Then the digital null signal is converted to a pair of differential analog voltage null signals. The pair of differential analog voltage null signals may be converted to a pair of differential analog current null signals. The pair of differential analog current null signals is provided to a pair of matched impedances to generate a pair of voltage signals across the pair of matched impedances. A voltage offset results from comparing the pair of voltages generated across the pair of matched impedances. Then a current offset is determined based on the voltage offset.
摘要:
A multi-mode band-gap current reference includes a band-gap current mode module and an adjustable current source module. The band-gap current module provides a band-gap reference current and a voltage representation of the band-gap reference current. The adjustable current source module is operably coupled to produce a process-independent band-gap current and a voltage representation of the process-independent band-gap current. The adjustable current source module produces the process-independent band-gap current based on a difference between the voltage representation of the band-gap reference current and the voltage representation of the process-independent band-gap current.
摘要:
Aspects of compensating for transmitter output power may comprise sampling an on-chip transmitter circuit temperature at various time instants and determining a feedback temperature compensation value. At least one digital-to-analog converter may be adjusted by utilizing the feedback temperature compensation value, which may correspond to the sampled temperature. The digital-to-analog converter may be an I-component digital-to-analog converter and/or a Q-component digital-to-analog converter. At least a portion of the on-chip transmitter circuit may be characterized to determine power output dependence of the on-chip transmitter circuit on temperature variation of the on-chip transmitter circuit. Based on this characterization, a feedback temperature compensation value that may correspond to the sampled temperature may be used to adjust the digital-to-analog converter. The feedback temperature compensation value may be, for example, from a lookup table or an algorithm.
摘要:
An engine for processing functions used in audio algorithms. The engine runs in parallel with a digital signal processor (DSP) in an audio chip to increase performance for that chip. Functions performed by the engine include biquad filtering and inverse discrete cosine transform (IDCT) including pre-multiplication, inverse Fast Fourier transform (IFFT), and post-multiplication, which would otherwise be performed by the DSP. The DSP is therefore free to perform other functions demanded by the chip. Resources in the engine are processed in a pipeline structure and are thus highly utilized. Data are stored in a predefined order to increase efficiency.
摘要:
A RF transmitter is operable to transmit a signal at a frequency specified by the Bluetooth protocol. A passive upconversion mixer, which comprises a pair of MOSFET switches, is utilized inside the RF transmitter. The passive upconversion mixer is operable to receive analog local oscillator (LO) signals to be utilized for controlling operation of each of the pair of MOSFET switches to transmit signals with maximum gain. A MOS threshold voltage VTH and a DC component of a received baseband signal, VBB—DC, are determined for each of the pair of MOSFET switches. The determined VTH and the determined VBB—DC of the received baseband signal are combined such as VTH+VBB—DC and compared with a DC component of the received LO signals, VLO—DC. The VLO—DC is set equal to VTH+VBB—DC, accordingly, to provide maximum gain from the passive upconversion mixer for signal transmission.
摘要:
A fast starting on-chip crystal oscillation circuit includes a power supply (Vdd) integrated circuit pad, a power return (Vss) integrated circuit pad, a 1st crystal integrated circuit pad, a 2nd crystal integrated circuit pad, a 1st transistor, a 2nd transistor, an inverter, a resistor, and two capacitors. The 1st and 2nd crystal IC pads couple a 1st and 2nd node of an external crystal oscillator to the fast starting on-chip crystal oscillation circuit. The 1st transistor, when activated, couples a power source connection of the inverter to the Vdd IC pad. The 2nd transistor, when activated, couples a power return connection of the inverter to the Vss IC pad. The input of the inverter is coupled to the 1st crystal IC pad and the output of the inverter is coupled to the 2nd crystal IC pad. The resistor is coupled in parallel with the inverter while the 1st capacitor is coupled to the input of the inverter and to the Vss IC pad. The 2nd capacitor is coupled to the output of the inverter and to the Vss IC pad. When the 1st and 2nd transistors are activated, an impulse voltage occurs between the 1st and 2nd crystal IC pads to initiate the oscillation of the crystal oscillator.
摘要:
A fast starting on-chip crystal oscillation circuit includes a (Vdd) IC pad, a (Vss) IC pad, a 1st crystal IC pad, a 2nd crystal IC pad, a 1st transistor, a 2nd transistor, an inverter, a resistor, and two capacitors. The 1st and 2nd crystal IC pads couple an external crystal oscillator to the fast starting on-chip crystal oscillation circuit. The 1st and 2nd transistors, when activated, couple power to the inverter. The input of the inverter is coupled to the 1st crystal IC pad and to the 1st capacitor. The output of the inverter is coupled to the 2nd crystal IC pad and to the 2nd capacitor. The resistor is coupled in parallel with the inverter. When the 1st and 2nd transistors are activated, an impulse voltage occurs between the 1st and 2nd crystal IC pads to initiate the oscillation of the crystal oscillator.
摘要:
A wristwatch calculator is provided with a keyboard for the entry of information into and control of operations of the apparatus. The keyboard comprises an array of switches connected in an X-Y matrix that is scanned by row and column to find and identify a key that has been depressed. The scanner is operated only when calculator circuitry in the apparatus is in a sleep or inactive mode in order to save battery power.