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1.发明授权公开(公告)号：US07610026B2
公开(公告)日：2009-10-27
申请号：US11503422
申请日：2006-08-11
IPC分类号： H04B1/04
CPC分类号： H04B1/0475
摘要： The present invention provides a transmitter architecture operable to cancel non-data-related direct current (DC) components therein. One method to cancel transmitter non-data-related DC offsets includes generating a baseband digital null signal. Then the digital null signal is converted to a pair of differential analog voltage null signals. The pair of differential analog voltage null signals may be converted to a pair of differential analog current null signals. The pair of differential analog current null signals is provided to a pair of matched impedances to generate a pair of voltage signals across the pair of matched impedances. A voltage offset results from comparing the pair of voltages generated across the pair of matched impedances. Then a current offset is determined based on the voltage offset.
摘要翻译： 本发明提供了一种可消除非数据相关直流（DC）分量的发射机结构。 消除发射机非数据相关DC偏移的一种方法包括产生基带数字无效信号。 然后数字零位信号被转换成一对差分模拟电压无效信号。 该差分模拟电压空信号可以转换成一对差分模拟电流无效信号。 一对差分模拟电流零点信号被提供给一对匹配的阻抗，以在一对匹配的阻抗上产生一对电压信号。 通过比较在该对匹配阻抗上产生的一对电压，产生电压偏移。 然后根据电压偏移确定电流偏移。
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公开(公告)号：US07092674B2
公开(公告)日：2006-08-15
申请号：US10460578
申请日：2003-06-12
IPC分类号： H04B1/38
CPC分类号： G05F3/30
摘要： A multi-mode band-gap current reference includes a band-gap current mode module and an adjustable current source module. The band-gap current module provides a band-gap reference current and a voltage representation of the band-gap reference current. The adjustable current source module is operably coupled to produce a process-independent band-gap current and a voltage representation of the process-independent band-gap current. The adjustable current source module produces the process-independent band-gap current based on a difference between the voltage representation of the band-gap reference current and the voltage representation of the process-independent band-gap current.
摘要翻译： 多模式带隙电流基准包括带隙电流模式模块和可调电流源模块。 带隙电流模块提供带隙参考电流和带隙参考电流的电压表示。 可调电流源模块可操作地耦合以产生与工艺无关的带隙电流的与工艺无关的带隙电流和电压表示。 可调电流源模块基于带隙基准电流的电压表示与过程无关带隙电流的电压表示之间的差异产生与工艺无关的带隙电流。
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公开(公告)号：US07459969B2
公开(公告)日：2008-12-02
申请号：US11503035
申请日：2006-08-11
IPC分类号： H03F1/14
CPC分类号： H03F3/24 , H03F1/02 , H03F1/0205 , H03F1/0227 , H03F1/025 , H03F1/0266 , H03F1/0277 , H03F3/45188 , H03F3/72 , H03F2200/321 , H03F2200/336 , H03F2200/451 , H03F2200/504 , H03F2200/507 , H03F2200/534 , H03F2203/45056 , H03F2203/45292 , H03F2203/45364 , H04B2001/0416 , H04B2001/045
摘要： A method to reduce transmitted output power and the battery consumption is provided. This involves first determining the required output level. The amplitude of the input signal provided to a PA driver may be based on the required output power level. This amplitude may be set by a PGA. A number of cascode bias signals are also provided to the PA driver. These cascode bias signals are based on the required output power level as well. Reducing the cascode bias signals by enabling/disabling circuits within the PA driver allows power consumption of the wireless device to be reduced.
摘要翻译： 提供了减少传输输出功率和电池消耗的方法。 这包括首先确定所需的输出电平。 提供给PA驱动器的输入信号的幅度可以基于所需的输出功率电平。 该幅度可以由PGA设定。 还向PA驱动器提供了多个共源共栅偏置信号。 这些共源共栅偏置信号也基于所需的输出功率电平。 通过启用/禁用PA驱动器中的电路来降低共源共栅偏置信号，可以降低无线设备的功耗。
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4.发明申请公开(公告)号：US20080039031A1
公开(公告)日：2008-02-14
申请号：US11503422
申请日：2006-08-11
IPC分类号： H04B1/04
CPC分类号： H04B1/0475
摘要： The present invention provides a transmitter architecture operable to cancel non-data-related direct current (DC) components therein. One method to cancel transmitter non-data-related DC offsets includes generating a baseband digital null signal. Then the digital null signal is converted to a pair of differential analog voltage null signals. The pair of differential analog voltage null signals may be converted to a pair of differential analog current null signals. The pair of differential analog current null signals is provided to a pair of matched impedances to generate a pair of voltage signals across the pair of matched impedances. A voltage offset results from comparing the pair of voltages generated across the pair of matched impedances. Then a current offset is determined based on the voltage offset.
摘要翻译： 本发明提供了一种可消除非数据相关直流（DC）分量的发射机结构。 消除发射机非数据相关DC偏移的一种方法包括产生基带数字无效信号。 然后数字零位信号被转换成一对差分模拟电压无效信号。 该差分模拟电压空信号可以转换成一对差分模拟电流无效信号。 一对差分模拟电流零点信号被提供给一对匹配的阻抗以在一对匹配的阻抗上产生一对电压信号。 通过比较在该对匹配阻抗上产生的一对电压，产生电压偏移。 然后根据电压偏移确定电流偏移。
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5.发明申请METHOD AND SYSTEM FOR OBTAINING MAXIMUM GAIN OF A PASSIVE UPCONVERSION MIXER UTILIZED IN A TRANSMITTER 有权用于获得在发射机中使用的被动式逆变混频器的最大增益的方法和系统公开(公告)号：US20100311329A1
公开(公告)日：2010-12-09
申请号：US12477301
申请日：2009-06-03
CPC分类号： H03C1/36 , H03D7/1458 , H03D7/1466 , H03D2200/0074
摘要： A RF transmitter is operable to transmit a signal at a frequency specified by the Bluetooth protocol. A passive upconversion mixer, which comprises a pair of MOSFET switches, is utilized inside the RF transmitter. The passive upconversion mixer is operable to receive analog local oscillator (LO) signals to be utilized for controlling operation of each of the pair of MOSFET switches to transmit signals with maximum gain. A MOS threshold voltage VTH and a DC component of a received baseband signal, VBB—DC, are determined for each of the pair of MOSFET switches. The determined VTH and the determined VBB—DC of the received baseband signal are combined such as VTH+VBB—DC and compared with a DC component of the received LO signals, VLO—DC. The VLO—DC is set equal to VTH+VBB—DC, accordingly, to provide maximum gain from the passive upconversion mixer for signal transmission.
摘要翻译： RF发射器可操作以以由蓝牙协议指定的频率发送信号。 无源上变频混频器包括一对MOSFET开关，用于RF发射器内部。 无源上变频混频器可操作以接收模拟本地振荡器（LO）信号，以用于控制一对MOSFET开关中的每一个的操作以发送具有最大增益的信号。 为这对MOSFET开关中的每一个确定接收基带信号VBB-DC的MOS阈值电压VTH和DC分量。 所接收的基带信号的确定的VTH和所确定的VBB-DC被组合，例如VTH + VBB-DC，并与所接收的LO信号VLO-DC的DC分量进行比较。 VLO-DC设置为等于VTH + VBB-DC，从而提供来自被动上变频混频器的信号传输的最大增益。
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公开(公告)号：US07109813B2
公开(公告)日：2006-09-19
申请号：US10459929
申请日：2003-06-12
IPC分类号： H03B5/32
摘要： A fast starting on-chip crystal oscillation circuit includes a power supply (Vdd) integrated circuit pad, a power return (Vss) integrated circuit pad, a 1st crystal integrated circuit pad, a 2nd crystal integrated circuit pad, a 1st transistor, a 2nd transistor, an inverter, a resistor, and two capacitors. The 1st and 2nd crystal IC pads couple a 1st and 2nd node of an external crystal oscillator to the fast starting on-chip crystal oscillation circuit. The 1st transistor, when activated, couples a power source connection of the inverter to the Vdd IC pad. The 2nd transistor, when activated, couples a power return connection of the inverter to the Vss IC pad. The input of the inverter is coupled to the 1st crystal IC pad and the output of the inverter is coupled to the 2nd crystal IC pad. The resistor is coupled in parallel with the inverter while the 1st capacitor is coupled to the input of the inverter and to the Vss IC pad. The 2nd capacitor is coupled to the output of the inverter and to the Vss IC pad. When the 1st and 2nd transistors are activated, an impulse voltage occurs between the 1st and 2nd crystal IC pads to initiate the oscillation of the crystal oscillator.
摘要翻译： 快速启动片上晶体振荡电路包括电源（Vdd）集成电路焊盘，功率返回（V SUB）集成电路焊盘，1 - >电容器耦合到反相器的输入端并连接到V SS芯片。 第二和第二电容器耦合到反相器的输出端和V SS芯片焊盘。 当第一和第二和第二晶体管被激活时，在第一和第二和第二晶体管之间产生脉冲电压， 晶体IC焊盘启动晶体振荡器的振荡。
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公开(公告)号：US07088193B2
公开(公告)日：2006-08-08
申请号：US11140779
申请日：2005-05-31
IPC分类号： H03B5/32
摘要： A fast starting on-chip crystal oscillation circuit includes a (Vdd) IC pad, a (Vss) IC pad, a 1st crystal IC pad, a 2nd crystal IC pad, a 1st transistor, a 2nd transistor, an inverter, a resistor, and two capacitors. The 1st and 2nd crystal IC pads couple an external crystal oscillator to the fast starting on-chip crystal oscillation circuit. The 1st and 2nd transistors, when activated, couple power to the inverter. The input of the inverter is coupled to the 1st crystal IC pad and to the 1st capacitor. The output of the inverter is coupled to the 2nd crystal IC pad and to the 2nd capacitor. The resistor is coupled in parallel with the inverter. When the 1st and 2nd transistors are activated, an impulse voltage occurs between the 1st and 2nd crystal IC pads to initiate the oscillation of the crystal oscillator.
摘要翻译： 一种快速启动片上晶体振荡电路包括（Vdd）IC焊盘，（V ss ss）IC焊盘，第一半导体芯片， 晶体IC焊盘，2晶体IC焊盘，第1晶体管，第2晶体管，反相器，电阻器和二极管 电容器 第一和第二晶体IC焊盘将外部晶体振荡器耦合到快速启动片上晶体振荡电路。 第一和第二和第二晶体管在被激活时将功率耦合到逆变器。 反相器的输入耦合到第一晶体IC焊盘和第一个<！ - SIPO
- >电容器。 反相器的输出耦合到第二晶体IC焊盘和第二个电容器。 电阻器与逆变器并联耦合。 当第一和第二和第二晶体管被激活时，在第一和第二和第二晶体管之间产生脉冲电压， 晶体IC焊盘启动晶体振荡器的振荡。 -
8.发明授权Method and system for single sideband mixing receiver architecture for improving signal quality 失效用于提高信号质量的单边带混合接收机架构的方法和系统公开(公告)号：US07583947B2
公开(公告)日：2009-09-01
申请号：US10977869
申请日：2004-10-29
IPC分类号： H04B1/10
CPC分类号： H04B1/302
摘要： Certain embodiments of the invention may be found in a method and system for single sideband mixing receiver architecture for improving signal quality in an RF communication system. An embodiment of the invention may mix a first input signal with a first local oscillator signal, via a first mixer, to generate a first mixed output signal. It may also mix a second input signal with a second local oscillator signal, via a second mixer, to generate a second mixed output signal. It may then generate a single sideband signal by adding the first mixed output signal and the second mixed output signal. The removal of one of two sidebands may reduce noise at the desired signal, since the removed sideband may have been at the same frequency as the desired signal.
摘要翻译： 可以在用于改善RF通信系统中的信号质量的单边带混合接收机架构的方法和系统中找到本发明的某些实施例。 本发明的实施例可以经由第一混频器将第一输入信号与第一本地振荡器信号混合，以产生第一混合输出信号。 它还可以通过第二混频器将第二输入信号与第二本地振荡器信号混合，以产生第二混合输出信号。 然后，可以通过将第一混合输出信号和第二混合输出信号相加来产生单个边带信号。 由于去除的边带可能处于与期望信号相同的频率，所以去除两个边带中的一个可能会降低所需信号处的噪声。
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公开(公告)号：US20080036532A1
公开(公告)日：2008-02-14
申请号：US11503035
申请日：2006-08-11
IPC分类号： H03F1/14
CPC分类号： H03F3/24 , H03F1/02 , H03F1/0205 , H03F1/0227 , H03F1/025 , H03F1/0266 , H03F1/0277 , H03F3/45188 , H03F3/72 , H03F2200/321 , H03F2200/336 , H03F2200/451 , H03F2200/504 , H03F2200/507 , H03F2200/534 , H03F2203/45056 , H03F2203/45292 , H03F2203/45364 , H04B2001/0416 , H04B2001/045
摘要： A method to reduce transmitted output power and the battery consumption is provided. This involves first determining the required output level. The amplitude of the input signal provided to a PA driver may be based on the required output power level. This amplitude may be set by a PGA. A number of cascode bias signals are also provided to the PA driver. These cascode bias signals are based on the required output power level as well. Reducing the cascode bias signals by enabling/disabling circuits within the PA driver allows power consumption of the wireless device to be reduced.
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10.发明申请Method and system for sharing GM stage for a second if mixer using a polyphase clock to reduce current consumption and improve matching 审中-公开如果混合器使用多相时钟减少电流消耗并改善匹配，则可以共享GM阶段的方法和系统公开(公告)号：US20060093069A1
公开(公告)日：2006-05-04
申请号：US10977210
申请日：2004-10-29
IPC分类号： H03D3/00
CPC分类号： H03D7/165 , H03D3/007 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D2200/0033 , H03D2200/0047 , H03D2200/0084
摘要： A method for improving signal quality in a receiver is provided. The method may comprise generating a plurality of output signals from a single I component Gm stage and a single Q component Gm stage. The generated plurality of output signals may be mirrored from said I component Gm stage to a first I component mixer circuit and a second I component mixer circuit, and from the Q component Gm stage to a first Q component mixer circuit and a second Q component mixer circuit. An output DC signal may be generated from an output of the first I component mixer circuit and the first Q component mixer circuit. An output may be generated that may comprise a difference signal from the second I component mixer circuit and the second Q component mixer circuit.
摘要翻译： 提供了一种用于提高接收机中的信号质量的方法。 该方法可以包括从单个I分量Gm级和单个Q分量Gm级产生多个输出信号。 所生成的多个输出信号可以从所述I分量Gm级到第一I分量混合电路和第二I分量混频器电路，并且从Q分量Gm级到第一Q分量混频器电路和第二Q分量混频器 电路。 可以从第一I分量混频器电路和第一Q分量混频器电路的输出产生输出DC信号。 可以产生可以包括来自第二I分量混频器电路和第二Q分量混频器电路的差分信号的输出。
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