公开(公告)号：US07866857B2

公开(公告)日：2011-01-11

申请号：US12495660

申请日：2009-06-30

Applicant: Ji-Ying Jin ,  Chuang Yue ,  Hong-Yi Tao ,  En-Long Hao

Inventor： Ji-Ying Jin ,  Chuang Yue ,  Hong-Yi Tao ,  En-Long Hao

IPC: F21V21/00

CPC classification number: F21V33/0052 ,  G06F1/1607

Abstract: A display device having an illumination device is provided. The display device includes a display, a body, and an illumination device. The display and the illumination device are mounted on the front surface of the body. A receiving space is defined in the front surface of the body and below the display. The illumination device is received in the receiving space and is pivotally connected to the body.

Abstract translation: 提供具有照明装置的显示装置。 显示装置包括显示器，主体和照明装置。 显示器和照明装置安装在身体的前表面上。 接收空间被限定在身体的前表面和显示器的下方。 照明装置被容纳在接收空间中并且枢转地连接到主体。

公开(公告)号：US20100303016A1

公开(公告)日：2010-12-02

申请号：US12791669

申请日：2010-06-01

Applicant: Ying Jin ,  Yufei Blankenship

Inventor： Ying Jin ,  Yufei Blankenship

IPC: H04W40/00

CPC classification number: H04L27/0008

Abstract: In one embodiment, a method for transmitting information includes processing a downlink transport channel to generate a transport block (TB) having a TB size. The TB size is selected by selecting a modulation and coding scheme index (ITBS) and a physical resource block index (NPRB). The TB size for the selected ITBS and NPRB is selected so that an effective code rate at an user equipment (UE) does not exceed a specified threshold. The effective code rate is defined as a number of downlink (DL) information bits including TB cyclic redundancy check (CRC) bits and code block CRC bits divided by a number of physical channel bits on Physical Downlink Shared Channel (PDSCH). The transport block is mapped to multiple spatial layers. The number of spatial layers N is greater than or equal to three. The multiple spatial layers are transmitted to the UE.

Abstract translation: 在一个实施例中，一种用于发送信息的方法包括处理下行链路传输信道以生成具有TB大小的传输块（TB）。 通过选择调制和编码方案索引（ITBS）和物理资源块索引（NPRB）来选择TB大小。 所选择的ITBS和NPRB的TB大小被选择为使用户设备（UE）的有效码率不超过指定的阈值。 有效码率被定义为包括TB循环冗余校验（CRC）比特和码块CRC比特除以物理下行链路共享信道（PDSCH）上的物理信道比特数的下行链路（DL）信息比特数。 传输块被映射到多个空间层。 空间层数N大于或等于3。 多个空间层被传送到UE。

公开(公告)号：US20080188044A1

公开(公告)日：2008-08-07

申请号：US12099827

申请日：2008-04-09

Applicant: Peng-Fu Hsu ,  Fong-Yu Yen ,  Yi-Shien Mor ,  Huan-Just Lin ,  Ying Jin ,  Hun-Jan Tao

Inventor： Peng-Fu Hsu ,  Fong-Yu Yen ,  Yi-Shien Mor ,  Huan-Just Lin ,  Ying Jin ,  Hun-Jan Tao

IPC: H01L21/8238

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L27/0922 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7833

Abstract: Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.

公开(公告)号：US20080099851A1

公开(公告)日：2008-05-01

申请号：US11552704

申请日：2006-10-25

Applicant: Peng-Fu Hsu ,  Fong-Yu Yen ,  Yi-Shien Mor ,  Huan-Just Lin ,  Ying Jin ,  Hun-Jan Tao

Inventor： Peng-Fu Hsu ,  Fong-Yu Yen ,  Yi-Shien Mor ,  Huan-Just Lin ,  Ying Jin ,  Hun-Jan Tao

IPC: H01L29/94 ,  H01L21/8238

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L27/0922 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/7833

Abstract: Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.

Abstract translation: 具有双金属栅极结构的半导体器件及其制造方法。 提供了具有由绝缘层分隔开的第一掺杂区域和第二掺杂区域的半导体衬底。 在第一掺杂区上形成第一金属栅叠层，在第二掺杂区上形成第二金属栅叠层。 密封层设置在第一栅极堆叠和第二栅极叠层的侧壁上。 第一金属栅叠层包括界面层，界面层上的高k电介质层，高k电介质层上的第一金属层，第一金属层上的金属插入层，金属上的第二金属层 插入层和第二金属层上的多晶硅层。 第二金属栅堆叠包括界面层，界面层上的高k电介质层，高k电介质层上的第二金属层和第二金属层上的多晶硅层。

公开(公告)号：US20070228480A1

公开(公告)日：2007-10-04

申请号：US11395175

申请日：2006-04-03

Applicant: Fong-Yu Yen ,  Peng-Fu Hsu ,  Ying Jin

Inventor： Fong-Yu Yen ,  Peng-Fu Hsu ,  Ying Jin

IPC: H01L29/78

CPC classification number: H01L21/823842 ,  H01L21/823857 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517

Abstract: A CMOS device has PMOS and NMOS transistors with different gate structures overlying a semiconductor device. A first gate structure overlying the PMOS device region has a first gate dielectric layer overlying the semiconductor substrate, and a first gate conductor overlying the first gate dielectric layer. A second gate device region overlying the NMOS device region has a second gate dielectric layer overlying the semiconductor substrate, and a second gate conductor overlying the first gate dielectric layer. The first gate conductor has a silicon-based material layer, and the second gate conductor has a metal-based material layer.

Abstract translation: CMOS器件具有覆盖半导体器件的不同栅极结构的PMOS和NMOS晶体管。 覆盖PMOS器件区的第一栅极结构具有覆盖在半导体衬底上的第一栅极电介质层和覆盖第一栅极介电层的第一栅极导体。 覆盖NMOS器件区域的第二栅极器件区域具有覆盖半导体衬底的第二栅极介电层和覆盖第一栅极介电层的第二栅极导体。 第一栅极导体具有硅基材料层，第二栅极导体具有金属基材料层。

公开(公告)号：US08737503B2

公开(公告)日：2014-05-27

申请号：US12725203

申请日：2010-03-16

Applicant: Yufei Blankenship ,  Ying Jin ,  Oghenekome Oteri

Inventor： Yufei Blankenship ,  Ying Jin ,  Oghenekome Oteri

IPC: H04B7/02

CPC classification number: H04L1/0656

Abstract: A system and method for multiple input, multiple output (MIMO) uplink (UL) layer mapping is provided. A method for mapping modulation symbols to multiple input, multiple output (MIMO) layers includes receiving a first set of modulation symbols corresponding to a first transport block, partitioning the first set of modulation symbols into M1 parts, assigning each of the M1 parts to one of the M1 MIMO layers, and transmitting the modulation symbols mapped onto the M1 MIMO layers. The first transport block includes a plurality of code blocks, all modulation symbols of at least one code block belongs to a single part, and M1 is a positive integer value greater than one.

Abstract translation: 提供了用于多输入多输出（MIMO）上行链路（UL）层映射的系统和方法。 将调制符号映射到多输入多输出（MIMO）层的方法包括：接收对应于第一传输块的第一组调制符号，将第一组调制符号划分为M1部分，将M1部分分配给一个 并且发送映射到M1 MIMO层上的调制符号。 第一传输块包括多个码块，至少一个码块的所有调制符号属于单个部分，并且M1是大于1的正整数值。

公开(公告)号：US08354999B2

公开(公告)日：2013-01-15

申请号：US12494315

申请日：2009-06-30

Applicant: Qiang Zhang ,  Ji-Ying Jin ,  Chuang Yue ,  Lie Zhang ,  En-Long Hao ,  Hong-Yi Tao

Inventor： Qiang Zhang ,  Ji-Ying Jin ,  Chuang Yue ,  Lie Zhang ,  En-Long Hao ,  Hong-Yi Tao

IPC: G09G5/00 ,  G09G5/08 ,  G06F3/033 ,  H01H83/00 ,  H01H35/02 ,  H01H35/14 ,  H01R39/00

CPC classification number: G06F3/03543 ,  H01H1/26 ,  H01H3/60

Abstract: A computer mouse includes a housing and a button assembly. The button assembly includes a button, a circuit board, a first conductive sheet, and a second conductive sheet. The button is exposed out of the housing. The circuit board is received in the housing, and includes a first contact and a second contact. The first conductive sheet has a first magnet fixed thereon, and is electrically connected to the first contact of the circuit board. The second conductive sheet is electrically connected to the second contact of the circuit board. The second conductive sheet is fixed to the button and contactable with the first conductive sheet when the button is pressed. The second magnet and the first magnet form a repulsive force therebetween.

Abstract translation: 计算机鼠标包括壳体和按钮组件。 按钮组件包括按钮，电路板，第一导电片和第二导电片。 该按钮暴露在外壳外。 电路板被容纳在壳体中，并且包括第一触点和第二触点。 第一导电片具有固定在其上的第一磁体，并且电连接到电路板的第一触点。 第二导电片与电路板的第二触点电连接。 当按下按钮时，第二导电片固定到按钮并与第一导电片接触。 第二磁体和第一磁体之间形成排斥力。

公开(公告)号：US08059752B2

公开(公告)日：2011-11-15

申请号：US13153293

申请日：2011-06-03

Applicant: Yufei Blankenship ,  Weimin Xiao ,  Ying Jin

Inventor： Yufei Blankenship ,  Weimin Xiao ,  Ying Jin

IPC: H04L27/00

CPC classification number: H04B7/0456 ,  H04B7/0632 ,  H04B7/0639 ,  H04L1/0003 ,  H04L1/0026 ,  H04L1/007 ,  H04L1/0073 ,  H04L1/1861 ,  H04L5/0023 ,  H04L5/0055 ,  H04L5/0057 ,  H04L5/006 ,  H04L27/2627 ,  H04W72/0413

Abstract: A system and method for system and method for multiplexing control and data channels in a multiple input, multiple output (MIMO) communications system are provided. A method for transmitting control symbols and data symbols on multiple MIMO layers includes selecting a first set of codewords from Ncw codewords, distributing control symbols onto the first set of layers, placing data symbols of the first set of codewords onto the first set of layers, placing data symbols of the (Ncw-Ncw1) remaining codewords to remaining layers if Ncw>Ncw1, and transmitting the multiple MIMO layers. The first set of codewords is associated with a first set of layers from the multiple MIMO layers, and the Ncw codewords are to be transmitted simultaneously and the first set of codewords comprises Ncw1 MIMO codewords, where Ncw and Ncw1 are integers greater than or equal to 1. The remaining layers are MIMO layers from the multiple MIMO layers not in the first set of layers.

Abstract translation: 提供了一种用于在多输入多输出（MIMO）通信系统中复用控制和数据信道的系统和方法的系统和方法。 一种用于在多个MIMO层上发送控制符号和数据符号的方法包括从Ncw码字中选择第一组码字，将控制符号分配到第一组层上，将第一组码字的数据符号放置在第一组层上， 如果Ncw> Ncw1，将（Ncw-Ncw1）剩余码字的数据符号放置到剩余层，并发送多个MIMO层。 第一组码字与来自多个MIMO层的第一组层相关联，并且Ncw码字将被同时传输，并且第一组码字包括Ncw1个MIMO码字，其中Ncw和Ncw1是大于或等于 其余层是来自多个MIMO层的MIMO层，而不是第一组层。

公开(公告)号：US20110082096A1

公开(公告)日：2011-04-07

申请号：US12966822

申请日：2010-12-13

Applicant: Richard A. Spritz ,  Ying Jin ,  Pamela Rae Fain

Inventor： Richard A. Spritz ,  Ying Jin ,  Pamela Rae Fain

IPC: A61K38/07 ,  A61K31/225 ,  A61P29/00 ,  A61P37/06 ,  C12Q1/68 ,  C12N5/02

CPC classification number: C12Q1/6883 ,  C12Q2600/156 ,  C12Q2600/172

Abstract: Embodiments of the present invention concern methods, compositions and uses thereof, relating to at least one of vitiligo, or vitiligo-associated autoimmune/autoinflammatory disease (VAAAD). In particular embodiments, genetic variations in the NALP1 gene are of use to detect, diagnose, predict the risk of or treat at least one of vitiligo or VAAAD. In more particular embodiments, the presence of genetic variations such as single-nucleotide polymorphisms (SNPs) in NALP1 genetic region are of use to detect, diagnose or predict the risk of VAAAD. In other embodiments, inhibitors targeted to NALP1, caspase-1 or caspase-5, ASC (PYCARD), interleukin-1β, interleukin-1β receptor, or interleukin 18 may be administered to a subject to treat VAAAD.

Abstract translation: 本发明的实施方案涉及与白癜风或白癜风相关的自身免疫/自身炎性疾病（VAAAD）中的至少一种相关的方法，组合物和用途。 在具体实施方案中，NALP1基因中的遗传变异可用于检测，诊断，预测白癜风或VAAAD中的至少一种的风险或治疗。 在更具体的实施方案中，NALP1遗传区域中遗传变异如单核苷酸多态性（SNP）的存在可用于检测，诊断或预测VAAAD的风险。 在其它实施方案中，靶向NALP1，半胱天冬酶-1或半胱天冬酶-5，ASC（PYCARD），白细胞介素-1和bgr;白细胞介素-1和bgr的抑制剂 受体或白细胞介素18可以施用于受试者以治疗VAAAD。

公开(公告)号：US07845974B2

公开(公告)日：2010-12-07

申请号：US12542706

申请日：2009-08-18

Applicant: Chuang Yue ,  Ji-Ying Jin ,  En-Long Hao ,  Qiang Zhang ,  Lie Zhang ,  Hong-Yi Tao

Inventor： Chuang Yue ,  Ji-Ying Jin ,  En-Long Hao ,  Qiang Zhang ,  Lie Zhang ,  Hong-Yi Tao

IPC: H01R13/72

CPC classification number: H01R13/72 ,  H01R13/514 ,  H01R25/003

Abstract: A power strip is provided. The power strip includes a first power cord to receive an input of electricity. The power strip also includes a housing including a plurality of socket modules for receiving electrical plugs. At least one socket module is removably attached to the housing and includes a second power cord connect to the first power cord.

Abstract translation: 提供电源板。 电源板包括用于接收电力输入的第一电源线。 电源板还包括壳体，其包括用于接收电插头的多个插座模块。 至少一个插座模块可移除地附接到壳体并且包括连接到第一电源线的第二电源线。