METHODS OF AND APPARATUS FOR ENCODING DATA ARRAYS

    公开(公告)号:US20180091818A1

    公开(公告)日:2018-03-29

    申请号:US15274044

    申请日:2016-09-23

    Applicant: ARM Limited

    CPC classification number: H04N19/523 H04N19/53

    Abstract: To perform motion estimation for a video frame block to be encoded, a difference measure is determined for each of a plurality of reference frame block positions at a first, coarser resolution. The determined difference measures are then used estimate difference measures for reference frame blocks at positions at a second resolution that is finer than the first resolution. The estimated second, finer position resolution difference measures are then used to select a set of reference frame block positions for which to determine “full” difference measures. The determined “full” difference measures for each of the selected reference frame block positions are then used to select the reference frame block position to use when encoding the frame block and a motion vector corresponding to that reference frame block position is associated with and encoded for the frame block being encoded.

    DATA PROCESSING SYSTEMS
    12.
    发明申请
    DATA PROCESSING SYSTEMS 审中-公开
    数据处理系统

    公开(公告)号:US20160100172A1

    公开(公告)日:2016-04-07

    申请号:US14873037

    申请日:2015-10-01

    Applicant: ARM Limited

    Abstract: A data processing system comprises a video processor (3). The data processing system is configured to, when a new frame (10) is to be encoded by the video processor (3), determine for a sub-region of a set of plural sub-regions that the new frame (10) is divided into, whether the sub-region has changed from a previous frame (11), and to control the encoding operation for the new frame (10) on the basis of the determination, e.g. to avoid performing motion estimation.

    Abstract translation: 数据处理系统包括视频处理器(3)。 数据处理系统被配置为当新的帧(10)将由视频处理器(3)编码时,确定新帧(10)被划分的多个子区域的集合的子区域 进入,子区域是否已经从先前帧(11)改变,并且基于该确定来控制新帧(10)的编码操作,例如 以避免执行运动估计。

    Protection circuity and method for controlling access by plural processes to a memory
    13.
    发明授权
    Protection circuity and method for controlling access by plural processes to a memory 有权
    用于控制多个处理对存储器的访问的保护电路和方法

    公开(公告)号:US09189646B2

    公开(公告)日:2015-11-17

    申请号:US14173418

    申请日:2014-02-05

    Applicant: ARM LIMITED

    CPC classification number: G06F21/6218 G06F21/78

    Abstract: A data processing apparatus is provided, comprising plural processing units configured to execute plural processes, a storage unit configured to store data required for the plural processes; and a protection unit configured to control access by the plural processes to the storage unit. The protection unit is configured to define an allocated access region of the storage unit for each process of the plural processes, wherein the protection unit is configured to deny access for each the process outside the allocated access region and wherein allocated access regions are defined to be non-overlapping. The protection unit is configured to define each allocated access region as a contiguous portion of the storage unit between a lower region limit and an upper region limit, and the protection unit is configured such that when the lower region limit is modified the lower region limit cannot be decreased and such that when the upper region limit is modified the upper region limit cannot be decreased.

    Abstract translation: 提供了一种数据处理装置,包括被配置为执行多个处理的多个处理单元,被配置为存储多个处理所需的数据的存储单元; 以及保护单元,被配置为控制通过所述多个处理对所述存储单元的访问。 保护单元被配置为为多个进程的每个进程定义存储单元的分配的访问区域,其中保护单元被配置为拒绝对所分配的访问区域之外的每个进程的访问,并且其中分配的访问区域被定义为 不重叠。 保护单元被配置为将每个分配的访问区域定义为存储单元在下限区域和上区域限制之间的连续部分,并且保护单元被配置为使得当下区域限制被修改时,下区域限制不能 并且使得当上限区域被修改时,上限区域不能减小。

    BROADCAST HUB FOR MULTI-PROCESSOR ARRANGEMENT

    公开(公告)号:US20230315677A1

    公开(公告)日:2023-10-05

    申请号:US17709255

    申请日:2022-03-30

    Applicant: Arm Limited

    CPC classification number: G06F15/80

    Abstract: The present disclosure relates generally to multi-processor arrangements and, more particularly, to broadcast hubs for multi-processor arrangements. A processing tile may comprise a broadcast hub to obtain a plurality of parameters applicable in a particular operation from at least one of a plurality of processing tiles and initiate distribution of the plurality of parameters to the plurality of processing tiles, wherein the plurality of processing tiles may execute the particular operation based at least in part on the plurality of distributed parameters.

    Head-mounted display
    15.
    发明授权

    公开(公告)号:US11500204B2

    公开(公告)日:2022-11-15

    申请号:US16896853

    申请日:2020-06-09

    Applicant: Arm Limited

    Abstract: A head-mounted display (HMD) comprising a first side for facing a user of the HMD, a second side opposite to the first side, and a reflective layer for at least partially reflecting incident light incident on the second side. At least one processor of the HMD is configured to obtain luminance data indicative of a luminance of the incident light and control a display device, based on the luminance data, to control a luminance of a portion of emitted light directed towards the user of the HMD during the display of the image. Further examples relate to an HMD with a display device configured to emit light of at least one predetermined wavelength range during display of an image by the display device, and a layer arranged to at least partially prevent transmission of the light of the at least one predetermined wavelength range outward from the HMD.

    Method of and apparatus for scaling data arrays

    公开(公告)号:US10255659B2

    公开(公告)日:2019-04-09

    申请号:US15238873

    申请日:2016-08-17

    Applicant: ARM Limited

    Abstract: A scaling apparatus for scaling data arrays, such as images, comprises first horizontal scaling stage circuitry operable to scale a data array input to the scaling apparatus in the horizontal direction, one or more line memories for storing horizontal lines for a data array, wherein the or each line memory is for storing a horizontal line of data for the data array, vertical scaling stage circuitry operable to read data stored in the one or more line memories and to scale the read data in the vertical direction, and second horizontal scaling stage circuitry operable to scale a data array in the horizontal direction.

    Data processing systems
    18.
    发明授权

    公开(公告)号:US10218978B2

    公开(公告)日:2019-02-26

    申请号:US14873037

    申请日:2015-10-01

    Applicant: ARM Limited

    Abstract: A data processing system comprises a video processor (3). The data processing system is configured to, when a new frame (10) is to be encoded by the video processor (3), determine for a sub-region of a set of plural sub-regions that the new frame (10) is divided into, whether the sub-region has changed from a previous frame (11), and to control the encoding operation for the new frame (10) on the basis of the determination, e.g. to avoid performing motion estimation.

    Invalidation of index items for a temporary data store
    20.
    发明授权
    Invalidation of index items for a temporary data store 有权
    临时数据存储的索引项目无效

    公开(公告)号:US09471493B2

    公开(公告)日:2016-10-18

    申请号:US14557649

    申请日:2014-12-02

    Applicant: ARM LIMITED

    CPC classification number: G06F12/0808 G06F12/0895

    Abstract: A data processing apparatus and corresponding method of data processing are provided. The data processing apparatus comprises a temporary data store configured to store data items retrieved from a memory, wherein the temporary data store selects one of its plural data storage locations in which to store a newly retrieved data item according to a predetermined circular sequence. An index data store is configured to store index items corresponding to the data items stored in the temporary data store, wherein presence of a valid index item in the index data store is indicative of a corresponding data item in the temporary data store. Invalidation control circuitry performs a rolling invalidation process with respect to the index items stored in the index data store, comprising sequentially processing the index items stored in the index data store and selectively marking the index items as invalid according to a predetermined criterion.

    Abstract translation: 提供了一种数据处理装置和相应的数据处理方法。 数据处理装置包括临时数据存储器,被配置为存储从存储器检索的数据项,其中临时数据存储器根据预定的循环序列选择其中存储新检索的数据项的多个数据存储位置中的一个。 索引数据存储器被配置为存储与存储在临时数据存储中的数据项相对应的索引项,其中,索引数据存储中的有效索引项的存在指示临时数据存储中的对应的数据项。 无效化控制电路对存储在索引数据存储器中的索引项执行滚动无效处理,包括依次处理存储在索引数据存储器中的索引项,并根据预定标准有选择地将索引项标记为无效。

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