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公开(公告)号：US20190018699A1
公开(公告)日：2019-01-17
申请号：US15663499
申请日：2017-07-28
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Anthony Asaro , Yinan Jiang , Andy Sung , Ahmed M. Abdelkhalek , Xiaowei Wang , Sidney D. Fortes
Abstract: A technique for recovering from a hang in a virtualized accelerated processing device (“APD”) is provided. In the virtualization scheme, different virtual machines are assigned different “time-slices” in which to use the APD. When a time-slice expires, the APD stops operations for a current VM and starts operations for another VM. To stop operations on the APD, a virtualization scheduler sends a request to idle the APD. The APD responds by completing work and idling. If one or more portions of the APD do not complete this idling process before a timeout expires, then a hang occurs. In response to the hang, the virtualization scheduler informs the hypervisor that a hang has occurred. The hypervisor performs a function level reset on the APD and informs the VM that the hang has occurred. The VM responds by stopping command issue to the APD and re-initializing the APD for the function.
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公开(公告)号：US20220188139A1
公开(公告)日：2022-06-16
申请号：US17121678
申请日：2020-12-14
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Kamraan Nasim , Dezhi Ming , Ahmed M. Abdelkhalek , Dmytro Chenchykov , Andy Sung
Abstract: A technique for managing access to a micro engine, the method comprising: determining that a virtual function “VF”) is to be given access to direct communication with a micro engine; in response to the determining, configuring the micro engine to accept direct communication from the VF; monitoring for unpermitted communication; and after a time period has expired, configuring the micro engine to no longer accept direct communication from the VF.
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公开(公告)号：US20220159286A1
公开(公告)日：2022-05-19
申请号：US17587497
申请日：2022-01-28
Applicant: ATI Technologies ULC
Inventor： Ahmed M. Abdelkhalek , Edward A. Harold , Andy Sung , Stephen Ho , Lei Zhang , Ihab Amer , Gabor Sines , Zhiqi Hao , Yang Liu , Baochun Li , Kai Sun
IPC: H04N19/463 , H04N19/593 , H04N19/152
Abstract: Systems, apparatuses, and methods for reducing latency when consuming an encoded video bitstream in real-time are disclosed. A video encoder encodes a video bitstream and writes chunks of the encoded bitstream to a bitstream buffer. Prior to the encoder completing the encoding of an entire frame, or an entire slice of a frame, a consumer module consumes encoded chunks of the bitstream. In one implementation, to enable pipelining of the consumption with the encoding, the encoder updates a buffer write pointer with an indication of the amount of data that has been written to the bitstream buffer. The consumer module retrieves encoded data from the bitstream buffer up to the location indicated by the buffer write pointer. In this way, the consumer module is able to access and consume encoded video data prior to the encoder finishing encoding an entire frame or an entire slice of the frame.
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公开(公告)号：US11252429B2
公开(公告)日：2022-02-15
申请号：US15965281
申请日：2018-04-27
Applicant: ATI Technologies ULC
Inventor： Ahmed M. Abdelkhalek , Edward A. Harold , Andy Sung , Stephen Ho , Lei Zhang , Ihab Amer , Gabor Sines , Zhiqi Hao , Yang Liu , Baochun Li , Kai Sun
IPC: H04N19/463 , H04N19/593 , H04N19/152
Abstract: Systems, apparatuses, and methods for reducing latency when consuming an encoded video bitstream in real-time are disclosed. A video encoder encodes a video bitstream and writes chunks of the encoded bitstream to a bitstream buffer. Prior to the encoder completing the encoding of an entire frame, or an entire slice of a frame, a consumer module consumes encoded chunks of the bitstream. In one implementation, to enable pipelining of the consumption with the encoding, the encoder updates a buffer write pointer with an indication of the amount of data that has been written to the bitstream buffer. The consumer module retrieves encoded data from the bitstream buffer up to the location indicated by the buffer write pointer. In this way, the consumer module is able to access and consume encoded video data prior to the encoder finishing encoding an entire frame or an entire slice of the frame.
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公开(公告)号：US11194614B2
公开(公告)日：2021-12-07
申请号：US16591276
申请日：2019-10-02
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Ahmed M. Abdelkhalek , Guopei Qiao , Andy Sung , Haibo Liu , Dezhi Ming , Zhidong Xu
Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.
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Patent Agency Ranking
公开(公告)号：US10452554B2
公开(公告)日：2019-10-22
申请号：US15094391
申请日：2016-04-08
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Ihab Amer , Khaled Mammou , Haibo Liu , Edward Harold , Fabio Gulino , Samuel Naffziger , Gabor Sines , Lawrence A. Bair , Andy Sung , Lei Zhang
IPC: G06F12/08 , G11C11/417 , G06F12/0877 , G06F12/0893 , G11C5/14
Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.
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公开(公告)号：US10250419B2
公开(公告)日：2019-04-02
申请号：US15651364
申请日：2017-07-17
Applicant: ATI Technologies ULC
Inventor： Andy Sung , Leon Lai , Daniel Wang
Abstract: A method and system is provided for allowing signals across electrical domains. The method includes applying a clock signal (of at least 1 GHz) to an electronic element in a location having first electrical properties. Data is output from the first electronic element; and received at a second electronic element located in a location having second electrical properties. The first and second electrical properties are different by either voltage and clock frequency.
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公开(公告)号：US20190004842A1
公开(公告)日：2019-01-03
申请号：US15639971
申请日：2017-06-30
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Ahmed M. Abdelkhalek , Guopei Qiao , Andy Sung , Haibo Liu , Dezhi Ming , Zhidong Xu
Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.
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公开(公告)号：US20170293564A1
公开(公告)日：2017-10-12
申请号：US15094391
申请日：2016-04-08
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Ihab Amer , Khaled Mammou , Haibo Liu , Edward Harold , Fabio Gulino , Samuel Naffziger , Gabor Sines , Lawrence A. Bair , Andy Sung , Lei Zhang
IPC: G06F12/08 , G11C11/417
CPC classification number: G06F12/0877 , G06F12/0893 , G06F2212/1028 , G06F2212/221 , G06F2212/60 , G11C5/148 , G11C11/417
Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.
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公开(公告)号：US20140093003A1
公开(公告)日：2014-04-03
申请号：US13632751
申请日：2012-10-01
Applicant: ATI TECHNOLOGIES ULC
Inventor： Andy Sung , Leon Lai , Daniel Wang
IPC: H04L27/00
Abstract: A method and system is provided for allowing signals across electrical domains. The method includes applying a clock signal (of at least 1 GHz) to an electronic element in a location having first electrical properties. Data is output from the first electronic element; and received at a second electronic element located in a location having second electrical properties. The first and second electrical properties are different by either voltage and clock frequency.
Abstract translation: 提供了一种用于允许跨电域的信号的方法和系统。 该方法包括在具有第一电特性的位置中将电子元件施加至少1GHz的时钟信号。 从第一电子元件输出数据; 并且在位于具有第二电性能的位置处的第二电子元件处接收。 电压和时钟频率的第一和第二电性能不同。
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