Multiple module bootup operation
    3.
    发明授权

    公开(公告)号:US12026520B2

    公开(公告)日:2024-07-02

    申请号:US17564557

    申请日:2021-12-29

    CPC classification number: G06F9/4406 G06F9/4843 G06F9/546 G06F2209/548

    Abstract: A system and method for efficiently measuring on-die power supply voltage are described. In various implementations, an integrated circuit includes at least one or more processors and on-chip memory. The on-chip memory has a higher security level than off-chip memory. One of the one or more processors is designated as a security processor. During the processing of the multiple boot steps of a bootup operation, the security processor initializes a message queue in on-chip memory. The security processor also loads multiple modules from off-chip memory into the on-chip memory. The processor executes the multiple loaded modules in an order based on using the message queue to implement inter-module communication among the plurality of boot modules. The security processor transfers requested data between modules using messages from the modules and data storage of the message queue. The modules are completed without reloading any modules from off-chip memory.

    ITERATIVE BOOT QUEUE
    4.
    发明公开

    公开(公告)号:US20230205886A1

    公开(公告)日:2023-06-29

    申请号:US17564444

    申请日:2021-12-29

    Abstract: A system and method for efficiently performing a bootup operation are described. In various implementations, an integrated circuit includes at least one or more processors and on-chip memory. The on-chip memory has a higher security level than off-chip memory. One of the one or more processors is designated as a security processor. During the processing of the multiple boot steps of a bootup operation, the security processor receives one or more out of band (OOB) events that are not included in the bootup operation. The security processor initializes both an OOB queue and a main boot queue in the on-chip memory. The security processor stores boot steps of the bootup operation in the main boot queue and stores received OOB events in the OOB queue. The security processor executes at least one OOB event prior to completing the bootup operation.

    Dynamic boot configuration
    5.
    发明授权

    公开(公告)号:US11966748B2

    公开(公告)日:2024-04-23

    申请号:US17490303

    申请日:2021-09-30

    CPC classification number: G06F9/4403 H04L9/3242 G06F9/4401 G06F9/4411

    Abstract: Techniques described herein provide users with the ability to persistently adjust settings for boot-time features (BTF) of a computing device. A user requests a particular BTF configuration adjustment for a device via a device driver. The driver instructs trusted firmware of the device to store a boot override record in persistent storage accessible by a bootloader for the device. Upon implementation of the boot sequence for the device, the bootloader applies the changes reflected in the record to BTF configuration data. The boot override information is persistently available to the bootloader, which ensures that the configuration changes that the boot override record(s) represent are applied to the BTFs of the device until the boot override record(s) are cleared or invalidated. Further, to ensure the security of boot override record(s), the trusted firmware generates, for each record, an HMAC tag using an HMAC key derived from a Chip Endorsement Fused Secret from the hardware.

    MULTIPLE MODULE BOOTUP OPERATION
    7.
    发明公开

    公开(公告)号:US20230205547A1

    公开(公告)日:2023-06-29

    申请号:US17564557

    申请日:2021-12-29

    CPC classification number: G06F9/4406 G06F9/4843 G06F9/546 G06F2209/548

    Abstract: A system and method for efficiently measuring on-die power supply voltage are described. In various implementations, an integrated circuit includes at least one or more processors and on-chip memory. The on-chip memory has a higher security level than off-chip memory. One of the one or more processors is designated as a security processor. During the processing of the multiple boot steps of a bootup operation, the security processor initializes a message queue in on-chip memory. The security processor also loads multiple modules from off-chip memory into the on-chip memory. The processor executes the multiple loaded modules in an order based on using the message queue to implement inter-module communication among the plurality of boot modules. The security processor transfers requested data between modules using messages from the modules and data storage of the message queue. The modules are completed without reloading any modules from off-chip memory.

    DYNAMIC BOOT CONFIGURATION
    8.
    发明申请

    公开(公告)号:US20230099455A1

    公开(公告)日:2023-03-30

    申请号:US17490303

    申请日:2021-09-30

    Abstract: Techniques described herein provide users with the ability to persistently adjust settings for boot-time features (BTF) of a computing device. A user requests a particular BTF configuration adjustment for a device via a device driver. The driver instructs trusted firmware of the device to store a boot override record in persistent storage accessible by a bootloader for the device. Upon implementation of the boot sequence for the device, the bootloader applies the changes reflected in the record to BTF configuration data. The boot override information is persistently available to the bootloader, which ensures that the configuration changes that the boot override record(s) represent are applied to the BTFs of the device until the boot override record(s) are cleared or invalidated. Further, to ensure the security of boot override record(s), the trusted firmware generates, for each record, an HMAC tag using an HMAC key derived from a Chip Endorsement Fused Secret from the hardware.

    SYNC POINT MECHANISM BETWEEN MASTER AND SLAVE NODES

    公开(公告)号:US20220147366A1

    公开(公告)日:2022-05-12

    申请号:US17095904

    申请日:2020-11-12

    Abstract: In a system with a master processor and slave processors, sync points are used in boot instructions. While executing the boot instructions, the slave processor determines whether the sync point is enabled. In response to determining the sync point is enabled, the slave processor pauses execution of the boot instructions, waits for commands from the master processor, receives commands from the master processor, executes the received commands until a release command is received, and then continues to execute boot instructions. In response to determining the sync point is not enabled, the slave processor continues to execute boot instructions.

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