公开(公告)号：US12067749B2

公开(公告)日：2024-08-20

申请号：US17562777

申请日：2021-12-27

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Anthony Chan ,  Christopher J. Brennan ,  Angel Serah

IPC: G06T7/90 ,  G01J3/46 ,  G06T9/00

CPC classification number: G06T7/90 ,  G01J3/463 ,  G06T9/00 ,  G01J2003/467 ,  G06T2207/10024

Abstract: Systems, apparatuses, and methods for performing color channel correlation detection are disclosed. A compression engine performs a color channel transform on an original set of pixel data to generate a channel transformed set of pixel data. An analysis unit determines whether to compress the channel transformed set of pixel data or the original set of pixel data based on performing a comparison of the two sets of pixel data. In one scenario, the channel transformed set of pixel data is generated by calculating the difference between a first pixel component and a second pixel component for each pixel of the set of pixel data. The difference is then compared to the original first pixel component for each pixel. If the difference is less than or equal to the original for a threshold number of pixels, then the analysis unit decides to apply the color channel transform prior to compression.

公开(公告)号：US11488328B2

公开(公告)日：2022-11-01

申请号：US17085851

申请日：2020-10-30

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Anthony Chan ,  Nooruddin Ahmed ,  Christopher J. Brennan ,  Bernard T. K. Chan

IPC: G06T9/00 ,  G06F17/15 ,  G06T15/00

Abstract: Systems, apparatuses, and methods for implementing automatic data format detection techniques are disclosed. A graphics engine receives data of indeterminate format and the graphics engine predicts an organization of the data. As part of the prediction, the graphics engine predicts the pixel depth (i.e., bytes per pixel (BPP)) and format separately. The graphics engine folds the data along pixel and channel boundaries to help in determining the pixel depth and format. The graphics engine scores modes against each other to generate different predictions for different formats. Then, the graphics engine generates scores for the predictions to determine which mode has a highest correlation with the input data. Next, the graphics engine chooses the format which attains the best score among the scores that were generated for the different modes. Then, the graphics engine compresses the unknown data using the chosen format with the best score.

公开(公告)号：US20180232316A1

公开(公告)日：2018-08-16

申请号：US15433560

申请日：2017-02-15

Applicant: ATI Technologies ULC

Inventor： Jimshed Mirza ,  Anthony Chan ,  Edwin Chi Yeung Pang

IPC: G06F12/1027 ,  G06F12/1009

CPC classification number: G06F12/1027 ,  G06F12/1009 ,  G06F2212/657 ,  G06F2212/68

Abstract: Systems, apparatuses, and methods for selecting default page sizes in a variable page size translation lookaside buffer (TLB) are disclosed. In one embodiment, a system includes at least one processor, a memory subsystem, and a first TLB. The first TLB is configured to allocate a first entry for a first request responsive to detecting a miss for the first request in the first TLB. Prior to determining a page size targeted by the first request, the first TLB specifies, in the first entry, that the first request targets a page of a first page size. Responsive to determining that the first request actually targets a second page size, the first TLB reissues the first request with an indication that the first request targets the second page size. On the reissue, the first TLB allocates a second entry and specifies the second page size for the first request.

公开(公告)号：US20180182155A1

公开(公告)日：2018-06-28

申请号：US15389075

申请日：2016-12-22

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Jimshed Mirza ,  Christopher J. Brennan ,  Anthony Chan ,  Leon Lai

IPC: G06T15/00 ,  G06T15/04 ,  G06T15/80 ,  G06F12/0875

Abstract: Systems, apparatuses, and methods for performing shader writes to compressed surfaces are disclosed. In one embodiment, a processor includes at least a memory and one or more shader units. In one embodiment, a shader unit of the processor is configured to receive a write request targeted to a compressed surface. The shader unit is configured to identify a first block of the compressed surface targeted by the write request. Responsive to determining the data of the write request targets less than the entirety of the first block, the first shader unit reads the first block from the cache and decompress the first block. Next, the first shader unit merges the data of the write request with the decompressed first block. Then, the shader unit compresses the merged data and writes the merged data to the cache.