公开(公告)号：US10810933B1

公开(公告)日：2020-10-20

申请号：US16505784

申请日：2019-07-09

Applicant: AU Optronics Corporation

Inventor： Chun-Feng Lin ,  Chuang-Cheng Yang ,  Ming-Hsien Lee ,  Yi-Cheng Lin ,  Wei-Chia Chiu

IPC: G09G3/30 ,  G09G3/32

Abstract: A control circuit includes a power supply switch unit and a reset switch unit. The power supply switch unit is electrically connected to a data line and a pixel circuit. When the data line has a data voltage, the power supply switch unit is turned on according to a power supply signal, so that the pixel circuit is charged by the data voltage. The reset switch unit is electrically connected to the pixel circuit. After the pixel circuit is charged by the data voltage, the reset switch unit is turned on according to the reset signal to reset a voltage of the pixel circuit to the reset voltage.

公开(公告)号：US10803788B2

公开(公告)日：2020-10-13

申请号：US16415454

申请日：2019-05-17

Applicant: AU Optronics Corporation

Inventor： Ming-Hsien Lee ,  Yi-Cheng Lin ,  Chuang-Cheng Yang ,  Kai-Wei Hong ,  Chun-Feng Lin

IPC: G09G3/32

Abstract: A driving circuit includes a first driving switch, a second driving switch and a current regulating unit. The first driving switch is electrically connected to a first power source and a first light emitting element. When the first driving switch is turned on, the first driving switch is configured to receive a first current. The second driving switch is electrically connected to a second power source and a second light emitting element. When the second driving switch is turned on, the second driving switch is configured to receive a second current. The current regulating unit is electrically connected to a negative terminal of the second light emitting element and a positive terminal of the first light emitting element. When the current regulating unit is disabled, the second current sequentially flows through the second light emitting element and the first light emitting element.

公开(公告)号：US10782808B2

公开(公告)日：2020-09-22

申请号：US16008039

申请日：2018-06-14

Applicant: Au Optronics Corporation

Inventor： Chun-Da Tu ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Chuang-Cheng Yang ,  Yi-Cheng Lin ,  Chun-Feng Lin

IPC: G06F3/041 ,  G09G3/20 ,  G11C19/28

Abstract: A shift register and a touch display apparatus thereof are provided. The shift register includes a voltage setting unit, a driving unit, a control unit, a discharge unit, a first compensation transistor, and a second compensation transistor. The voltage setting unit sets a terminal voltage of an internal terminal. The driving unit is coupled to the internal terminal to provide a gate signal and a driving signal. The control unit receives the terminal voltage to provide a control signal. The discharge unit discharges the terminal voltage and the gate signal according to the control signal. The first compensation transistor and the second compensation transistor are coupled in series between a touch enable signal and the internal terminal, and control terminals of the first compensation transistor and the second compensation transistor receive the terminal voltage and the touch enable signal, respectively.

公开(公告)号：US10733952B2

公开(公告)日：2020-08-04

申请号：US16111531

申请日：2018-08-24

Applicant: AU Optronics Corporation

Inventor： Yi-Cheng Lin ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Chun-Da Tu ,  Chuang-Cheng Yang ,  Chun-Feng Lin

IPC: G09G3/36

Abstract: A multiplexer applied to a display device includes: a plurality of switching units, electrically coupled to a data driver and a plurality of pixel units, where the switching units are adapted to receive a plurality of input display data signals output by the data driver, and the switching units output a plurality of output display data signals to the electrically coupled pixel units, where each of the switching units includes a plurality of switch units, configuration locations of the switch units in each of the switching units are the same as, and some of the switch units configured at a same configuration location in the different switching units are electrically coupled to different control signal lines and have different wiring lengths, where the wiring lengths are distances between the switch units and the control signal lines.

公开(公告)号：US20190287444A1

公开(公告)日：2019-09-19

申请号：US16055144

申请日：2018-08-05

Applicant: Au Optronics Corporation

Inventor： Chun-Da Tu ,  Ming-Hsien Lee ,  Yi-Cheng Lin ,  Kai-Wei Hong ,  Chuang-Cheng Yang ,  Chun-Feng Lin

IPC: G09G3/20 ,  G11C19/28

Abstract: A display panel including a pixel array, a plurality of first shift registers, a plurality of second shift registers, a plurality of first discharge circuits, and a plurality of second discharge circuits is provided. The pixel array includes a plurality of gate lines. The shift registers provide a plurality of gate signals to the gate lines. Each of the first discharge circuits receives a third gate signal to discharge a same first gate line together with the corresponding first shift register. A rising edge of the third gate signal substantially matches a falling edge of the corresponding first gate signal. Each of the second discharge circuits receives a fourth gate signal to discharge a same second gate line together with the corresponding second shift register. A rising edge of the fourth gate signal substantially matches a falling edge of the corresponding second gate signal.

公开(公告)号：US11120749B2

公开(公告)日：2021-09-14

申请号：US16708712

申请日：2019-12-10

Applicant: AU Optronics Corporation

Inventor： Chun-Feng Lin ,  Kai-Wei Hong ,  Chuang-Cheng Yang ,  Yi-Cheng Lin ,  Ming-Hsien Lee

IPC: G09G3/3291 ,  G09G3/3266

Abstract: A display device includes a driving circuit and a control circuit. The driving circuit is configured to receive a data voltage in response to a scanning signal, and to control the brightness of a light emitting element according to the data voltage. The control circuit is configured to provide a stop signal to the driving circuit in response to a digital signal and the scanning signal, so as to stop the light emitting element from emitting light, and in turn control the light emission period of the light emitting element.

公开(公告)号：US10748473B2

公开(公告)日：2020-08-18

申请号：US16527758

申请日：2019-07-31

Applicant: AU Optronics Corporation

Inventor： Chuang-Cheng Yang ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Yi-Cheng Lin ,  Chun-Feng Lin

IPC: G09G3/32 ,  H03K17/00 ,  H03K25/02 ,  H03K7/08 ,  H03K17/284 ,  G09G3/20

Abstract: The disclosure provides a light emitting diode including a light emitting diode (LED), a first transistor, a second transistor and capacitor. A cathode terminal of the LED is configured to receive a first power supply voltage. A first port of the capacitor coupled to the gate of the first transistor is configured to store a data signal in a first duration. A first port of the second transistor is configured to receive a second power supply voltage. A gate of the second transistor is configured to receive a PWM signal in a second duration. A second port of the second transistor is coupled to the second port of the first transistor. The second transistor is turned on for a conducting time in the second duration according to the PWM signal, and the first transistor provides, in the conducting time, a drive current to the LED according to the data signal.

公开(公告)号：US10339854B2

公开(公告)日：2019-07-02

申请号：US15864498

申请日：2018-01-08

Applicant: AU OPTRONICS CORPORATION

Inventor： Chuang-Cheng Yang ,  Chun-Feng Lin ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Chun-Da Tu ,  Yi-Cheng Lin

IPC: G09G3/20 ,  G09G3/36

Abstract: Provided is a gate driving circuit, coupled to a pixel array having multiple gate lines. The gate driving circuit includes multiple shift registers and multiple pull-up transistor, coupled to the pixel array and separately located on two opposite sides of the pixel array. Shift registers located on a same side are sequentially coupled to each other. An nth (n is a positive integer) pull-up transistor includes: a control end, coupled to a control end of a driving transistor of an (n−1)th shift register located on a same side as the nth pull-up transistor; a first end, used to receive a clock signal, where the clock signal is further input to an nth shift register of the shift registers located on an opposite side of the nth pull-up transistor; and a second end, coupled to an nth gate line of the pixel array and used to drive the nth gate line.

公开(公告)号：US10152913B1

公开(公告)日：2018-12-11

申请号：US15830386

申请日：2017-12-04

Applicant: AU Optronics Corporation

Inventor： Yi-Cheng Lin ,  Ming-Hsien Lee ,  Kai-Wei Hong ,  Chun-Da Tu ,  Chuang-Cheng Yang ,  Chun-Feng Lin

IPC: G09G3/20

Abstract: An anti-interference display panel includes a source driving chip, a switching signal line, a multiplexer, and an anti-interference signal line. The source driving chip is configured to generate a data signal. The switching signal line is configured to transmit a switching signal. The multiplexer is configured to receive the data signal and the switching signal, and is configured to output the data signal according to the switching signal. The anti-interference signal line is configured to transmit an anti-interference signal. An equivalent resistor and an equivalent capacitor are formed on the anti-interference signal line, and resistance of the equivalent resistor is approximate to resistance of a load resistor coupled to the switching signal line, and capacitance of the equivalent capacitor is approximate to capacitance of a load capacitor coupled to the switching signal line. A voltage of the anti-interference signal falls when a voltage of the switching signal rises, and rises when the voltage of the switching signal falls.

公开(公告)号：US20150340384A1

公开(公告)日：2015-11-26

申请号：US14468353

申请日：2014-08-26

Applicant: Au Optronics Corporation

Inventor： Yi-Cheng Lin ,  Yu-Chi Chen

IPC: H01L27/12 ,  H01L33/38

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3244 ,  H01L27/3258 ,  H01L27/326 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3276 ,  H01L33/387 ,  H01L51/5218 ,  H01L2251/308

Abstract: A pixel structure includes a first conductive layer, a semiconductor layer, an insulating layer, a second conductive layer, a passivation layer, and a first electrode layer. The first conductive layer includes a scan line and a bottom electrode. The semiconductor layer includes a first semiconductor pattern having a first source region, a first drain region, and a first channel region. The insulating layer is disposed on the semiconductor layer. The second conductive layer is disposed on the insulating layer and includes a top electrode, a first gate, a first source, a first drain, and a data line connected with the first source. The bottom electrode and the top electrode overlap to form a capacitor. The passivation layer covers the first and second conductive layers and the semiconductor layer. The first electrode layer is disposed on the passivation layer and provides electrical connection to different layers.

Abstract translation: 像素结构包括第一导电层，半导体层，绝缘层，第二导电层，钝化层和第一电极层。 第一导电层包括扫描线和底部电极。 半导体层包括具有第一源极区，第一漏极区和第一沟道区的第一半导体图案。 绝缘层设置在半导体层上。 第二导电层设置在绝缘层上，包括顶电极，第一栅极，第一源极，第一漏极和与第一源极连接的数据线。 底部电极和顶部电极重叠以形成电容器。 钝化层覆盖第一和第二导电层和半导体层。 第一电极层设置在钝化层上并提供与不同层的电连接。