HIGH-BANDWIDTH MEMORY MODULE ARCHITECTURE
    11.
    发明公开

    公开(公告)号:US20230178121A1

    公开(公告)日:2023-06-08

    申请号:US17849089

    申请日:2022-06-24

    CPC classification number: G11C7/1039 G11C7/1063 G11C7/109 G11C7/1048 G11C7/222

    Abstract: A high-bandwidth dual-inline memory module (HB-DIMM) includes a plurality of memory chips, a plurality of data buffer chips, and a register clock driver (RCD) circuit. The data buffer chips are coupled to respective sets of the memory chips and transmit data from the memory chips over a host bus at a data rate twice that of the memory chips. The RCD circuit includes a host bus interface and a memory interface coupled to the plurality of memory chips. The RCD circuit implements commands received over the host bus by routing command/address (C/A) signals to the memory chips for providing at least two independently addressable pseudo-channels, the RCD circuit addressing each respective pseudo-channel based on a chip identifier (CID) bit derived from the C/A signals.

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