公开(公告)号：US20240164021A1

公开(公告)日：2024-05-16

申请号：US18420528

申请日：2024-01-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Fan CHEN ,  Chien-Hao WANG

IPC: H05K1/18 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538

CPC classification number: H05K1/183 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/568 ,  H01L23/5383 ,  H01L23/5386 ,  H01L2224/04105 ,  H01L2924/11 ,  H01L2924/15153 ,  H05K2201/10

Abstract: A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

公开(公告)号：US20210074554A1

公开(公告)日：2021-03-11

申请号：US16565064

申请日：2019-09-09

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Chien-Fan CHEN ,  Yu-Ju LIAO

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: An embedded component package structure including a dielectric structure, a semiconductor chip and a patterned conductive layer is provided. The semiconductor chip is embedded in the dielectric structure, and the dielectric structure encapsulates the semiconductor chip and has a first thickness. The semiconductor chip having a second thickness, and the first thickness is greater than the second thickness, and a ratio of the first thickness to the second thickness is between 1.1 and 28.4. The patterned conductive layer covers an upper surface of the dielectric structure and extending into a first opening of the dielectric structure. The first opening exposes an electrical pad of the semiconductor chip, and the patterned conductive layer is electrically connected to the electrical pad of the semiconductor chip.

公开(公告)号：US20200343188A1

公开(公告)日：2020-10-29

申请号：US16397539

申请日：2019-04-29

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Yu-Ju LIAO ,  Chien-Fan CHEN ,  Chien-Hao WANG

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/67 ,  H05K3/46

Abstract: An embedded component package structure including a dielectric structure and a component is provided. The component is embedded in the dielectric structure and is provided with a plurality of conductive pillars. The conductive pillars are exposed from an upper surface of the dielectric structure and have a first thickness and a second thickness, respectively, and the first thickness is not equal to the second thickness.

公开(公告)号：US20200343187A1

公开(公告)日：2020-10-29

申请号：US16397530

申请日：2019-04-29

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Yu-Ju LIAO ,  Chien-Fan CHEN ,  Chien-Hao WANG

IPC: H01L23/538 ,  H01L21/48 ,  H05K3/46

Abstract: An embedded component package structure including a dielectric structure, a semiconductor chip, a first polymer layer, and a patterned conductive layer is provided. The semiconductor chip is embedded in the dielectric structure. The first polymer layer covers the semiconductor chip and has a first thickness, and the first thickness is greater than a second thickness of the dielectric structure above the first polymer layer. The patterned conductive layer covers an upper surface of the dielectric structure and extends over the first polymer layer, and the patterned conductive layer is electrically connected to the semiconductor chip.