公开(公告)号：US20170309586A1

公开(公告)日：2017-10-26

申请号：US15643714

申请日：2017-07-07

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Julien Sylvestre

IPC分类号： H01L23/00 ,  H01L21/66 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L21/50

CPC分类号： H01L24/17 ,  H01L21/50 ,  H01L21/563 ,  H01L22/14 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/1184 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/17517 ,  H01L2224/29286 ,  H01L2224/29387 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81013 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16251 ,  H01L2924/182 ,  H01L2924/3701 ,  H01L2924/00 ,  H01L2924/11

摘要： An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.

公开(公告)号：US09711474B2

公开(公告)日：2017-07-18

申请号：US14495575

申请日：2014-09-24

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Gia-Her Lu ,  Liang-Chen Lin ,  Tung-Chin Yeh ,  Jyun-Lin Wu ,  Tung-Jiun Wu

IPC分类号： H01L23/00 ,  H01L21/683 ,  H01L23/14 ,  H01L23/538 ,  H01L23/31 ,  H01L21/56 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L24/14 ,  H01L21/563 ,  H01L21/6836 ,  H01L23/147 ,  H01L23/3157 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/562 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2224/02372 ,  H01L2224/03002 ,  H01L2224/036 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05687 ,  H01L2224/0569 ,  H01L2224/06181 ,  H01L2224/10126 ,  H01L2224/11002 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11849 ,  H01L2224/13014 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14136 ,  H01L2224/14177 ,  H01L2224/14179 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32013 ,  H01L2224/32058 ,  H01L2224/32106 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83855 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92222 ,  H01L2224/92225 ,  H01L2224/92242 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2224/81805 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/27 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/11 ,  H01L2924/0105 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2221/68304 ,  H01L2224/83 ,  H01L21/56 ,  H01L21/304 ,  H01L2221/68368

摘要： A semiconductor package structure includes a semiconductor substrate including a plurality of through substrate vias (TSV) extending from a first surface to a second surface of the semiconductor substrate, wherein the second surface is opposite to the first surface; a plurality of conductive bumps on the second surface and connected to a corresponding TSV; a polymeric layer on the second surface and surrounding a lower portion of a corresponding conductive bump. The polymeric layer includes a first portion configured as a blanket covering a periphery region of the semiconductor substrate; and a second portion in a core region of the semiconductor substrate and configured as a plurality of isolated belts, wherein each of the isolated belts surrounds a corresponding conductive bump.

公开(公告)号：US20180219004A1

公开(公告)日：2018-08-02

申请号：US15325391

申请日：2016-02-03

申请人： SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.

发明人： Kosuke IKEDA

IPC分类号： H01L25/07 ,  H01L25/18

CPC分类号： H01L25/072 ,  H01L23/49833 ,  H01L24/32 ,  H01L24/83 ,  H01L25/18 ,  H01L2224/01 ,  H01L2224/32225 ,  H01L2224/83815 ,  H01L2924/11

摘要： A semiconductor device has a first board (10); and an intermediate layer (20) being provided on the first board (10) and having a plurality of connectors (31), (41). The first board (10) has a positioning section (5) that positions the intermediate layer (20). The intermediate layer (10) is provided with a positioning insertion section (37), (47), into which the positioning section (5) is inserted.

公开(公告)号：US20140131855A1

公开(公告)日：2014-05-15

申请号：US13676250

申请日：2012-11-14

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Julien Sylvestre

IPC分类号： H01L21/50 ,  H01L23/498

CPC分类号： H01L24/17 ,  H01L21/50 ,  H01L21/563 ,  H01L22/14 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/1184 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/17517 ,  H01L2224/29286 ,  H01L2224/29387 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81013 ,  H01L2224/81024 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81805 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16251 ,  H01L2924/182 ,  H01L2924/3701 ,  H01L2924/00 ,  H01L2924/11

摘要： A method of assembling a semiconductor chip to a substrate wherein at least one of the semiconductor chip and substrate comprise solder bumps. The method includes aligning the semiconductor chip with the substrate; applying a compression force to the semiconductor chip to cause the solder bumps to deform between the semiconductor chip pads and the substrate pads, the compression force being applied while the semiconductor chip and substrate are held at a temperature above room temperature and below a temperature at which any liquid will form in at least one of the solder bumps; then applying an underfill material to fill the gap between the chip and substrate; and then heating the assembled semiconductor chip and substrate to an elevated temperature to cause the solder bumps to melt and reflow and form a metallurgical bond between the semiconductor chip pads and the substrate pads.

摘要翻译： 一种将半导体芯片组装到基板的方法，其中半导体芯片和基板中的至少一个包括焊料凸块。 该方法包括使半导体芯片与衬底对准; 对半导体芯片施加压缩力以使焊料凸起在半导体芯片焊盘和衬底焊盘之间变形，当半导体芯片和衬底保持在高于室温并低于其温度时，施加压缩力 任何液体将形成在至少一个焊料凸块中; 然后施加底部填充材料以填充芯片和基板之间的间隙; 然后将组装的半导体芯片和衬底加热到​​升高的温度，以使焊料凸起熔化并回流，并在半导体芯片焊盘和衬底焊盘之间形成冶金结合。

公开(公告)号：US20140070346A1

公开(公告)日：2014-03-13

申请号：US13790060

申请日：2013-03-08

申请人： MEDIATEK INC.

发明人： Ming-Tzong YANG ,  Cheng-Chou HUNG ,  Tung-Hsing LEE ,  Wei-Che HUANG ,  Yu-Hua HUANG

IPC分类号： H01L23/522 ,  H01L31/18

CPC分类号： H01L21/76898 ,  H01L21/02107 ,  H01L21/268 ,  H01L21/30625 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L31/18 ,  H01L2223/6616 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/11 ,  H01L2924/12042 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： The invention provides a radio-frequency (RF) device package and a method for fabricating the same. An exemplary embodiment of a radio-frequency (RF) device package includes a base, wherein a radio-frequency (RF) device chip is mounted on the base. The RF device chip includes a semiconductor substrate having a front side and a back side. A radio-frequency (RF) component is disposed on the front side of the semiconductor substrate. An interconnect structure is disposed on the RF component, wherein the interconnect structure is electrically connected to the RF component, and a thickness of the semiconductor substrate is less than that of the interconnect structure. A through hole is formed through the semiconductor substrate from the back side of the semiconductor substrate, and is connected to the interconnect structure. A TSV structure is disposed in the through hole.

摘要翻译： 本发明提供一种射频（RF）器件封装及其制造方法。 射频（RF）器件封装的示例性实施例包括基座，其中射频（RF）器件芯片安装在基座上。 RF器件芯片包括具有前侧和后侧的半导体衬底。 射频（RF）部件设置在半导体衬底的前侧。 互连结构设置在RF部件上，其中互连结构电连接到RF部件，并且半导体衬底的厚度小于互连结构的厚度。 从半导体衬底的背面穿过半导体衬底形成一个通孔，并连接到互连结构。 TSV结构设置在通孔中。

公开(公告)号：US11882660B2

公开(公告)日：2024-01-23

申请号：US18095511

申请日：2023-01-10

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chien-Fan Chen ,  Chien-Hao Wang

IPC分类号： H05K1/18 ,  H01L21/48 ,  H01L23/538 ,  H01L21/56

CPC分类号： H05K1/183 ,  H01L21/486 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/5383 ,  H01L23/5386 ,  H01L2224/04105 ,  H01L2924/11 ,  H01L2924/15153 ,  H05K2201/10

摘要： A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

公开(公告)号：US20230164920A1

公开(公告)日：2023-05-25

申请号：US18095511

申请日：2023-01-10

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chien-Fan CHEN ,  Chien-Hao WANG

IPC分类号： H05K1/18 ,  H01L21/48 ,  H01L23/538 ,  H01L21/56

CPC分类号： H05K1/183 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/5383 ,  H01L21/568 ,  H01L23/5386 ,  H05K2201/10 ,  H01L2924/15153 ,  H01L2224/04105 ,  H01L2924/11

摘要： A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

公开(公告)号：US09601455B2

公开(公告)日：2017-03-21

申请号：US14755334

申请日：2015-06-30

申请人： ROHM CO., LTD.

发明人： Yuto Nishiyama ,  Motoharu Haga

IPC分类号： G01R33/02 ,  H01L23/00 ,  H01L21/78 ,  G01R33/00 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L24/48 ,  G01R33/0005 ,  G01R33/0047 ,  G01R33/02 ,  G01R33/0206 ,  G01R33/24 ,  H01L21/561 ,  H01L21/78 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49838 ,  H01L24/32 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/05554 ,  H01L2224/05644 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48145 ,  H01L2224/48157 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/11 ,  H01L2924/146 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599

摘要： A semiconductor device includes: a substrate including a base member having a main surface and a back surface facing opposite in a thickness direction; a semiconductor element mounted on the main surface of the substrate and having at least one element pad; a wire having a bonding portion bonded to the element pad; and a sealing resin formed on the main surface of the substrate for covering the wire and at least a portion of the semiconductor element. The semiconductor element has an element exposed side surface that faces in a direction crossing the thickness direction of the substrate and is exposed from the sealing resin.

公开(公告)号：US09425098B2

公开(公告)日：2016-08-23

申请号：US14621703

申请日：2015-02-13

申请人： MediaTek Inc.

发明人： Ming-Tzong Yang ,  Cheng-Chou Hung ,  Tung-Hsing Lee ,  Wei-Che Huang ,  Yu-Hua Huang

IPC分类号： H01L23/00 ,  H01L21/768 ,  H01L21/268 ,  H01L21/306 ,  H01L23/522 ,  H01L31/18 ,  H01L23/48 ,  H01L21/02 ,  H01L23/66

CPC分类号： H01L21/76898 ,  H01L21/02107 ,  H01L21/268 ,  H01L21/30625 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L31/18 ,  H01L2223/6616 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/11 ,  H01L2924/12042 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for fabricating a electronic device package provides a electronic device chip, wherein the electronic device chip includes a semiconductor substrate having a front side and a back side, wherein the semiconductor substrate has a first thickness, an electronic component disposed on the front side of the semiconductor substrate, and an interconnect structure disposed on the electronic component. The method further performs a thinning process to remove a portion of the semiconductor substrate from the back side thereof. The method then removes a portion of the thinned semiconductor substrate and a portion of a dielectric layer of the interconnect structure from a back side of the thinned semiconductor substrate until a first metal layer pattern of the interconnect structure is exposed, thereby forming a through hole. Finally, the method forms a TSV structure in the through hole, and mounts the electronic device chip on a base.

摘要翻译： 一种制造电子器件封装的方法，提供了一种电子器件芯片，其中电子器件芯片包括具有正面和背面的半导体衬底，其中半导体衬底具有第一厚度，电子部件设置在第一厚度的前侧 半导体衬底和布置在电子部件上的互连结构。 该方法还进行薄膜化处理以从其背面去除半导体衬底的一部分。 然后，该方法从减薄的半导体衬底的背面去除一部分减薄的半导体衬底和互连结构的电介质层的一部分，直到互连结构的第一金属层图案被暴露，从而形成通孔。 最后，该方法在通孔中形成TSV结构，并将电子设备芯片安装在基座上。

公开(公告)号：US20150187718A1

公开(公告)日：2015-07-02

申请号：US14656650

申请日：2015-03-12

申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY

发明人： Muhammad Mujeeb-U-Rahman ,  Axel Scherer

IPC分类号： H01L23/00

CPC分类号： H01L21/285 ,  A61B2562/125 ,  B81C1/00111 ,  B81C1/0038 ,  H01L21/02425 ,  H01L21/28556 ,  H01L24/14 ,  H01L29/41 ,  H01L31/00 ,  H01L33/387 ,  H01L2224/1401 ,  H01L2924/11

摘要： Three dimensional high surface electrodes are described. The electrodes are fabricated by methods including the steps: designing the pillars; selecting a material for the formation of the pillars; patterning the material; transferring the pattern to form the pillars; insulating the pillars and providing a metal layer for increased conductivity. Alternative methods for fabrication of the electrodes and fabrication of the electrodes using CMOS are also described.

摘要翻译： 描述三维高表面电极。 电极通过以下方法制造：包括以下步骤：设计支柱; 选择用于形成支柱的材料; 图案化材料; 转移模式形成支柱; 绝缘柱并提供用于增加导电性的金属层。 还描述了用于制造电极和使用CMOS制造电极的替代方法。