公开(公告)号：US12040287B2

公开(公告)日：2024-07-16

申请号：US17963067

申请日：2022-10-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsing Kuo Tien ,  Chih-Cheng Lee

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/538 ,  H01L25/16

CPC classification number: H01L23/562 ,  H01L21/4857 ,  H01L23/5383 ,  H01L23/5385 ,  H01L23/5389 ,  H01L25/16

Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, and a first circuit layer disposed on the substrate. The first circuit layer includes a conductive wiring pattern, and the conductive wiring pattern is an uppermost conductive pattern of the first circuit layer. The stress buffering structure is disposed on the first conductive structure. The second conductive structure is disposed over the stress buffering structure. The conductive wiring pattern extends through the stress buffering structure and electrically connected to the second conductive structure, and an upper surface of the conductive wiring pattern is substantially coplanar with an upper surface of the stress buffering structure.

公开(公告)号：US11997798B2

公开(公告)日：2024-05-28

申请号：US17899553

申请日：2022-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wu Chou Hsu ,  Hsing Kuo Tien ,  Chih-Cheng Lee ,  Min-Yao Chen

IPC: H05K1/02 ,  H01L21/48 ,  H01L23/10 ,  H01L23/498 ,  H01L23/544 ,  H01L25/16 ,  H01L25/18 ,  H05K1/18 ,  H05K3/30

CPC classification number: H05K3/30 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/544 ,  H05K1/0266 ,  H05K1/183 ,  H01L2223/54426 ,  H05K2201/1003 ,  H05K2203/166

Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.

公开(公告)号：US11239184B2

公开(公告)日：2022-02-01

申请号：US16899507

申请日：2020-06-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wu Chou Hsu ,  Chih-Cheng Lee ,  Min-Yao Chen ,  Hsing Kuo Tien

IPC: H01L23/552 ,  H01L23/64 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.

公开(公告)号：US11062996B2

公开(公告)日：2021-07-13

申请号：US16528336

申请日：2019-07-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsing Kuo Tien ,  Chih Cheng Lee

IPC: H01L23/538 ,  H01L21/48 ,  H01L23/31

Abstract: A semiconductor device package includes a magnetically permeable layer having a top surface and a bottom surface opposite to the top surface. The semiconductor device package further includes a first conductive element in the magnetically permeable layer. The semiconductor device package further includes a first conductive via extending from the top surface of the magnetically permeable layer into the magnetically permeable layer to be electrically connected to the first conductive element. The first conductive via is separated from the magnetically permeable layer. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US11018120B2

公开(公告)日：2021-05-25

申请号：US16434075

申请日：2019-06-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Mei Huang ,  Shih-Yu Wang ,  I-Ting Lin ,  Wen Hung Huang ,  Yuh-Shan Su ,  Chih-Cheng Lee ,  Hsing Kuo Tien

IPC: H01L25/16 ,  H01L23/31 ,  H01L23/00 ,  H01L23/522 ,  H01L21/56 ,  H01L23/528 ,  H01L23/29

Abstract: A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.