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公开(公告)号:US11432406B2
公开(公告)日:2022-08-30
申请号:US17025939
申请日:2020-09-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou Hsu , Hsing Kuo Tien , Chih-Cheng Lee , Min-Yao Chen
IPC: H02K5/04 , H02K33/00 , H05K3/30 , H01L21/00 , H01L21/56 , H01L23/10 , H01L23/498 , H01L23/544 , H05K1/18 , H05K1/02 , H01L21/48
Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
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公开(公告)号:US11342272B2
公开(公告)日:2022-05-24
申请号:US16899517
申请日:2020-06-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou Hsu , Min-Yao Chen
IPC: H01L23/495 , H01L23/538 , H01L23/31 , H01L23/00 , H01L21/48
Abstract: A substrate structure, a method for manufacturing the same and a semiconductor package structure including the same are provided. The substrate structure includes a substrate, a first electronic component, a second electronic component and a plurality of metal layers. The first electronic component is disposed within the substrate. The second electronic component is disposed within the substrate and arranged in a horizontal direction with the first electronic component. The metal layers are disposed above an upper surface of the substrate. The number of metal layers above the first electronic component is greater than the number of metal layers above the second electronic component.
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公开(公告)号:US11335650B2
公开(公告)日:2022-05-17
申请号:US16899515
申请日:2020-06-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou Hsu , Chih-Cheng Lee , Min-Yao Chen , Hsing Kuo Tien
Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate. The electronic component includes a conductive wire comprising an alignment mark section and a connection section, and a magnetic layer partially covering the conductive wire. The magnetic layer includes an alignment window disposed in an upper surface of the magnetic layer and exposing a first upper surface of the alignment mark section, and a recess disposed in the upper surface of the magnetic layer and exposing a second upper surface of the connection section. The conductive trace is in the recess and electrically connected to the second upper surface of the connection section of the conductive wire.
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公开(公告)号:US11997798B2
公开(公告)日:2024-05-28
申请号:US17899553
申请日:2022-08-30
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou Hsu , Hsing Kuo Tien , Chih-Cheng Lee , Min-Yao Chen
IPC: H05K1/02 , H01L21/48 , H01L23/10 , H01L23/498 , H01L23/544 , H01L25/16 , H01L25/18 , H05K1/18 , H05K3/30
CPC classification number: H05K3/30 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H01L23/544 , H05K1/0266 , H05K1/183 , H01L2223/54426 , H05K2201/1003 , H05K2203/166
Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
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公开(公告)号:US11239184B2
公开(公告)日:2022-02-01
申请号:US16899507
申请日:2020-06-11
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wu Chou Hsu , Chih-Cheng Lee , Min-Yao Chen , Hsing Kuo Tien
IPC: H01L23/552 , H01L23/64 , H01L23/31 , H01L23/538 , H01L21/48 , H01L21/56 , H01L23/00
Abstract: The present disclosure provides a package substrate and method of manufacturing the same. The package substrate includes a substrate, an electronic component and a conductive trace. The electronic component is disposed in the substrate, and the electronic component includes a magnetic layer and a conductive wire. The conductive wire includes a first section embedded in the magnetic layer, and a second section connected to the first section and thinner than the first section. A first upper surface of the first section is covered by the magnetic layer, a second upper surface of the second section is lower than the first upper surface, and the magnetic layer includes a first recess disposed in the upper surface and exposing the second upper surface of the second section. The first conductive trace is in the first recess and electrically connected to the second upper surface of the second section of the conductive wire.
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