公开(公告)号：US20240203741A1

公开(公告)日：2024-06-20

申请号：US18388043

申请日：2023-11-08

Applicant: Applied Materials, Inc.

Inventor： Nicolas Louis BREIL ,  Avgerinos V. GELATOS

IPC: H01L21/285 ,  H01L21/02 ,  H01L21/3065 ,  H01L29/40

CPC classification number: H01L21/28518 ,  H01L21/02068 ,  H01L21/3065 ,  H01L29/401 ,  H01J37/32357 ,  H01J2237/334 ,  H01J2237/335

Abstract: A method of forming an electrical contact in a semiconductor structure includes performing a cavity shaping process on a semiconductor structures having an n-type metal oxide semiconductor (n-MOS) region and a p-type MOS (p-MOS) region, the cavity shaping process comprising forming an n-MOS cavity in an exposed surface of the n-MOS region and a p-MOS cavity in an exposed surface of the p-MOS region, and performing a first selective deposition process to form a p-MOS cavity contact, selectively in the p-MOS cavity.

公开(公告)号：US20240105509A1

公开(公告)日：2024-03-28

申请号：US18472062

申请日：2023-09-21

Applicant: Applied Materials, Inc.

Inventor： Nicolas Louis BREIL ,  Abhijit B. MALLICK ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L21/768 ,  H01L21/02 ,  H01L23/522

CPC classification number: H01L21/76879 ,  H01L21/02164 ,  H01L21/0228 ,  H01L21/76802 ,  H01L23/5226

Abstract: Embodiments of the present disclosure are provide a method for fabricating a semiconductor device with fewer via voids (e.g., gaps between a dielectric layer and a metal fill of the semiconductor device). One such technique involves forming a dielectric layer, wherein at least a portion of the dielectric layer comprises a nonstoichiometric compound; forming one or more openings in the dielectric layer; filling the one or more openings with a metal, wherein the metal is disposed on a surface of each of the one or more openings; and exposing the dielectric layer and metal disposed in the openings to an oxidizing atmosphere, wherein exposing the dielectric layer and metal in the openings causes oxidation of the nonstoichiometric compound.

公开(公告)号：US20240105505A1

公开(公告)日：2024-03-28

申请号：US18471472

申请日：2023-09-21

Applicant: Applied Materials, Inc.

Inventor： Nicolas Louis BREIL ,  Abhijit B. MALLICK ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L21/768 ,  H01L21/3115 ,  H01L23/522

CPC classification number: H01L21/76814 ,  H01L21/31155 ,  H01L21/76804 ,  H01L21/76877 ,  H01L23/5226

Abstract: Embodiments of the present disclosure provide techniques for fabricating a semiconductor device with fewer via voids (e.g., gaps between a dielectric layer and a metal fill of the semiconductor device). One such technique involves forming a dielectric layer over a surface of a substrate, forming one or more openings in the dielectric layer, filling the one or more openings with a metal wherein the metal is disposed on a surface of each of the one or more openings, and implanting an oxygen containing species into the dielectric layer to provide a dose of the oxygen containing species to the surface of each of the one or more openings and the metal disposed thereon.

公开(公告)号：US20240014076A1

公开(公告)日：2024-01-11

申请号：US18206427

申请日：2023-06-06

Applicant: Applied Materials, Inc.

Inventor： Nicolas Louis BREIL ,  Avgerinos V. GELATOS ,  Balasubramanian PRANATHARTHIHARAN

IPC: H01L21/8238 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L21/823871 ,  H01L21/76879 ,  H01L21/76843 ,  H01L21/7685 ,  H01L21/02362 ,  H01L21/02491 ,  H01L21/02381

Abstract: A method of forming an electrical contact in a semiconductor structure includes performing a patterning process to form a hard mask on a semiconductor structure comprising a first semiconductor region, a second semiconductor region, a dielectric layer having a first opening over the first semiconductor region and a second opening over the second semiconductor region, wherein the hard mask covers an exposed surface of the first semiconductor region within the first opening, performing a first selective deposition process to form a contact layer on the exposed surface of the second semiconductor region within the second opening, and performing a second selective deposition process to form a cap layer on the contact layer.