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    Epitaxy metrology in fin field effect transistors
    16.
    发明授权
    Epitaxy metrology in fin field effect transistors 有权

    公开(公告)号：US11455715B2

    公开(公告)日：2022-09-27

    申请号：US17177119

    申请日：2021-02-16

    Applicant: Applied Materials Israel Ltd.

    Inventor： Jitendra Pradipkumar Chaudhary ,  Roman Kris ,  Ran Alkoken ,  Sahar Levin ,  Chih-Chieh Chang ,  Einat Frishman

    IPC: G06T7/12 ,  G06T7/00 ,  H01L29/66 ,  G06T7/13

    Abstract: There is provided a system and method of performing a measurement with respect to an epitaxy formed in a finFET, the epitaxy being separated with at least one adjacent epitaxy by at least one HK fin. The method comprises obtaining an image of the epitaxy and the at least one HK fin, and a gray level (GL) profile indicative of GL distribution of the image; detecting edges of the at least one HK fin; determining two inflection points of the GL profile within an area of interest in the image; performing a critical dimension (CD) measurement between the two inflection points; determining whether to apply correction to the CD measurement based on a GL ratio indicative of a relative position between the epitaxy and the at least one HK fin; and applying correction to the CD measurement upon the GL ratio meeting a predetermined criterion.

    EVALUATING AN INTERMEDIATE PRODUCT RELATED TO A THREE-DIMENSIONAL NAND MEMORY UNIT
    19.
    发明申请
    EVALUATING AN INTERMEDIATE PRODUCT RELATED TO A THREE-DIMENSIONAL NAND MEMORY UNIT 有权

    公开(公告)号：US20210066026A1

    公开(公告)日：2021-03-04

    申请号：US16917304

    申请日：2020-06-30

    Applicant: APPLIED MATERIALS ISRAEL LTD.

    Inventor： Roman Kris ,  Vadim Vereschagin ,  Assaf Shamir ,  Elad Sommer ,  Sharon Duvdevani-Bar ,  Meng Li Cecilia Lim

    IPC: H01J37/22 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11551 ,  H01J37/28

    Abstract: A method, non-transitory computer readable medium and an evaluation system for evaluating an intermediate product related to a three dimensional NAND memory unit. The evaluation system may include an imager and a processing circuit. The imager may be configured to obtain, via an open gap, an electron image of a portion of a structural element that belongs to an intermediate product. The structural element may include a sequence of layers that include a top layer that is followed by alternating nonconductive layers and recessed conductive layers. The imager may include electron optics configured to scan the portion of the structural element with an electron beam that is oblique to a longitudinal axis of the open gap. The processing circuit is configured to evaluate the intermediate product based on the electron image. The open gap (a) exhibits a high aspect ratio, (b) has a width of nanometric scale, and (c) is formed between structural elements of the intermediate product.

    Method for monitoring nanometric structures
    20.
    发明授权
    Method for monitoring nanometric structures 有权

    公开(公告)号：US10731979B2

    公开(公告)日：2020-08-04

    申请号：US15870622

    申请日：2018-01-12

    Applicant: Applied Materials Israel, Ltd.

    Inventor： Shimon Levi ,  Ishai Schwarzband ,  Roman Kris

    IPC: G01B15/08 ,  G03F7/20 ,  G01B15/00 ,  B82Y35/00

    Abstract: A method for monitoring a first nanometric structure formed by a multiple patterning process, the method may include performing a first plurality of measurements to provide a first plurality of measurement results; wherein the performing of the first plurality of measurements comprises illuminating first plurality of locations of a first sidewall of the first nanometric structure by oblique charged particle beams of different tilt angles; and processing, by a hardware processor, the first plurality of measurement results to determine a first attribute of the first nanometric structure.

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