公开(公告)号：US20210295584A1

公开(公告)日：2021-09-23

申请号：US16825346

申请日：2020-03-20

Applicant: Arm Limited

Inventor： Andreas Due Engh-Halstvedt ,  Frank Klaeboe Langtind ,  Mark Underwood

IPC: G06T15/00 ,  G06T1/20 ,  G06T1/60 ,  G06T15/80

Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.

公开(公告)号：US20200065107A1

公开(公告)日：2020-02-27

申请号：US16112094

申请日：2018-08-24

Applicant: Arm Limited

Inventor： Mark Underwood ,  Hakan Lars-Goran Persson

IPC: G06F9/38 ,  G06F9/30 ,  G06F9/52

Abstract: A data processing system in which a host processor prepares command streams for causing an accelerator of the data processing system to perform processing tasks for an application executing on the host processor, each command stream including a sequence of commands for implementation by a command stream execution unit of the accelerator. A pre-execution unit is provided that is operable to interpret commands fetched from command stream storage before the command is provided to the command stream execution unit for implementation to determine whether the pre-execution unit is able to perform an action in response to the command and, when the pre-execution unit is able to do so, to perform an action in response to the command.

公开(公告)号：US11734869B2

公开(公告)日：2023-08-22

申请号：US17511032

申请日：2021-10-26

Applicant: Arm Limited

Inventor： Andreas Due Engh-Halstvedt ,  Frank Klaeboe Langtind ,  Mark Underwood

IPC: G06T1/60 ,  G06T15/00 ,  G06T15/80 ,  G06T1/20

CPC classification number: G06T15/005 ,  G06T1/20 ,  G06T1/60 ,  G06T15/80

Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.

公开(公告)号：US20200257555A1

公开(公告)日：2020-08-13

申请号：US16273448

申请日：2019-02-12

Applicant: Arm Limited

Inventor： Mark Underwood ,  Sandeep Kakarlapudi ,  Robert John Rees

IPC: G06F9/48 ,  G06F9/52 ,  G06F9/38 ,  G06F12/0837

Abstract: A method of controlling a data processor to perform data processing operations is disclosed in which a host processor prepares one or more queue(s) of operations for execution by the data processor. When an error is encountered in the processing of an operation for one of the one or more queue(s), a queue can be set into an error state in which instructions that may have a data dependency on another operation are not executed. The host processor includes in the queues error barrier instructions that divide the respective queues into sets of operations between which there are no data processing dependencies. An error state for a queue can thus be cleared when its processing reaches the next error barrier instruction in the queue.

公开(公告)号：US20200050478A1

公开(公告)日：2020-02-13

申请号：US16056927

申请日：2018-08-07

Applicant: Arm Limited

Inventor： Mark Underwood ,  Hakan Lars-Goran Persson

IPC: G06F9/48

Abstract: A data processing system in which a host processor prepares command streams for causing an accelerator of the data processing system to perform processing tasks for an application executing on the host processor, each command stream including a sequence of commands for implementation by the accelerator. When a request for processing includes protected content, the host processor includes within a command for a command stream, an indication that a subsequent sequence of one or more command(s) within that command stream associated with the protected content is to be implemented by the accelerator in a protected mode of operation. Then, when that command is executed, the accelerator initiates or requests a switch into the protected mode of operation.