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公开(公告)号：US20240169646A1
公开(公告)日：2024-05-23
申请号：US18509436
申请日：2023-11-15
Applicant: Arm Limited
Inventor： Tord Kvestad Øygard , Sandeep Kakarlapudi
CPC classification number: G06T15/005 , G06T11/40
Abstract: When performing tile-based rendering a first, pre-pass operation in which primitives in a sequence of primitives for a tile are processed to determine visibility information for the sequence of primitives, the visibility information being usable to determine whether or not fragments for a primitive in the sequence of primitives should subsequently be processed further for the render output, is performed. Thereafter a second, main pass operation is performed in which the further processing of fragments for primitives that were processed during the first, pre-pass operation is controlled based on the determined visibility information for the sequence of primitives, such that for fragments for which the visibility information indicates that the fragments should not be processed further for the render output some or all of the processing during the second, main pass is omitted. The first, pre-pass can be stopped to process primitives in a fail-safe manner if necessary.
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公开(公告)号：US10062140B2
公开(公告)日：2018-08-28
申请号：US15369778
申请日：2016-12-05
Applicant: ARM Limited
Inventor： Sandeep Kakarlapudi , Marius Bjørge , Jan-Harald Fredriksen
CPC classification number: G06T1/20 , G06T15/005 , G06T15/10 , G06T15/80 , G06T2210/52 , H04N13/122
Abstract: In a graphics processing system, when rendering plural views of the same scene (step 43), such as for stereoscopic rendering, the vertex shading operation is configured so that rather than executing the vertex shader program separately for each view that is being rendered, a single vertex shading program is executed once for all the views. The vertex shader program that is executed is configured to, for view-dependent operations, perform the respective operation separately for each view (step 48), so as to derive an appropriate vertex shaded output attribute value for each view, and is configured to, for vertex shading operations that are not dependent upon the view being rendered, perform those vertex shading operations only once for the set of views and to provide only a single vertex shaded output value for each vertex attribute in question for the set of views (step 49).
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公开(公告)号：US10013790B2
公开(公告)日：2018-07-03
申请号：US15042540
申请日：2016-02-12
Applicant: ARM Limited
Inventor： Sandeep Kakarlapudi , Andreas Due Engh-Halstvedt , Lars Oskar Flordal , Arne Bergene Fossaa
CPC classification number: G06T15/005 , G06T11/40
Abstract: In a graphics processing system, a driver for the graphics processing pipeline can include conditional graphics processing tasks in the graphics processing tasks that are to be executed by the graphics processing pipeline to generate a render output required by an application. Each such conditional task has associated with it a condition to be used by the graphics processing pipeline to determine whether to execute processing for the task or not and a region of the render output over which the processing for the task will be executed when the condition for the task is met. The graphics processing pipeline determines whether the condition associated with the task has been met, and only executes the processing for the task if the condition associated with the task has been met.
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公开(公告)号：US20170330372A1
公开(公告)日：2017-11-16
申请号：US15594969
申请日：2017-05-15
Applicant: ARM Limited
Inventor： Sandeep Kakarlapudi , Jorn Nystad , Andreas Due-Engh Halstvedt
CPC classification number: G06T15/405 , G06T1/20 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/80 , G06T19/20 , H04N13/275
Abstract: A graphics processing pipeline comprises vertex shading circuitry that operates to vertex shade position attributes of vertices of a set of vertices to be processed by the graphics processing pipeline, to generate, inter alia, a separate vertex shaded position attribute value for each view of the plural different views. Tiling circuitry then determines for the vertices that have been subjected to the first vertex shading operation, whether the vertices should be processed further. Vertex shading circuitry then performs a second vertex shading operation on the vertices that it has been determined should be processed further, to vertex shade the remaining vertex attributes for each vertex that it has been determined should be processed further, to generate, inter alia, a single vertex shaded attribute value for the set of plural views.
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公开(公告)号：US20210383600A1
公开(公告)日：2021-12-09
申请号：US16897160
申请日：2020-06-09
Applicant: Arm Limited
Inventor： Olof Henrik Uhrenholt , Sandeep Kakarlapudi
Abstract: A method of operating a graphics processor that comprises a renderer that can render primitives to generate a render output using different shading rates is disclosed. A shading rate for rendering a primitive is determined based on a depth value for the primitive. This can reduce processing effort required to render a render output while maintaining an acceptable image quality.
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Patent Agency Ranking
公开(公告)号：US20200257555A1
公开(公告)日：2020-08-13
申请号：US16273448
申请日：2019-02-12
Applicant: Arm Limited
Inventor： Mark Underwood , Sandeep Kakarlapudi , Robert John Rees
IPC: G06F9/48 , G06F9/52 , G06F9/38 , G06F12/0837
Abstract: A method of controlling a data processor to perform data processing operations is disclosed in which a host processor prepares one or more queue(s) of operations for execution by the data processor. When an error is encountered in the processing of an operation for one of the one or more queue(s), a queue can be set into an error state in which instructions that may have a data dependency on another operation are not executed. The host processor includes in the queues error barrier instructions that divide the respective queues into sets of operations between which there are no data processing dependencies. An error state for a queue can thus be cleared when its processing reaches the next error barrier instruction in the queue.
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公开(公告)号：US20180144437A1
公开(公告)日：2018-05-24
申请号：US15804784
申请日：2017-11-06
Applicant: Arm Limited
Inventor： Sandeep Kakarlapudi
Abstract: In a graphics processing system, an application executing on a host processor can request graphics processing operations that are to be performed by only subsets of the set of stages of a graphics processing pipeline implemented by a graphics processor. In response to such a request, the driver for the graphics processor causes the graphics processing operation that is to be performed using only a subset of the set of stages of the graphics processing pipeline to be performed. The driver can cause the graphics processing operation that is to be performed by the subset of stages of the graphics processing pipeline to be performed by the graphics processor, or on the host processor.
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公开(公告)号：US20140267377A1
公开(公告)日：2014-09-18
申请号：US13845604
申请日：2013-03-18
Applicant: ARM LIMITED
Inventor： Andreas Engh Halstvedt , Sean Tristram Ellis , Jorn Nystad , Sandeep Kakarlapudi
IPC: G06T5/00
CPC classification number: G06T11/40
Abstract: A graphics processing pipeline determines whether respective graphics processing operations, such as respective blends, respective depth tests, etc., to be performed at a stage of the graphics processing pipeline would produce the same result for each sampling point of a set of plural sampling points represented by a fragment being processed by the graphics processing pipeline. If it is determined that respective graphics processing operations would produce the same result for each of the sampling points, then only a single instance of the graphics processing operation is performed and the result of that graphics processing operation is associated with each of the sampling points. The number of instances of the graphics processing operations needed to process the set of plural sampling points which the fragment represents is reduced in comparison to conventional multisampling graphics processing techniques which perform graphics processing operations for fragments on a “per sample” basis. The determination of whether or not the same result would be produced for each sampling point of the set of plural sampling points is facilitated by providing metadata which indicates whether or not fragment data and/or stored sample data for use when processing the sampling points is the same.
Abstract translation: 图形处理流水线确定在图形处理流水线的阶段执行各自的图形处理操作，例如相应的混合，相应的深度测试等，将为一组多个采样点的每个采样点产生相同的结果 由图形处理流水线处理的片段表示。 如果确定相应的图形处理操作将为每个采样点产生相同的结果，则仅执行图形处理操作的单个实例，并且该图形处理操作的结果与每个采样点相关联。 与以“每个样本”为基础对片段执行图形处理操作的传统多采样图形处理技术相比，处理片段表示的多个采样点集合所需的图形处理操作的实例的数量减少了。 通过提供指示是否在处理采样点时使用的片段数据和/或存储的采样数据是否为...的元数据，便于确定是否对该组多个采样点的每个采样点产生相同结果的确定 相同。
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公开(公告)号：US20240169644A1
公开(公告)日：2024-05-23
申请号：US18509426
申请日：2023-11-15
Applicant: Arm Limited
Inventor： Tord Kvestad Øygard , Sandeep Kakarlapudi , Toni Viki Brkic , William Robert Stoye
CPC classification number: G06T15/005 , G06T11/40
Abstract: When performing tile-based rendering a first, pre-pass operation in which primitives in a sequence of primitives for a tile are processed to determine visibility information for the sequence of primitives, the visibility information being usable to determine whether or not fragments for a primitive in the sequence of primitives should subsequently be processed further for the render output, is performed. Thereafter a second, main pass operation is performed in which the further processing of fragments for primitives that were processed during the first, pre-pass operation is controlled based on the determined visibility information for the sequence of primitives, such that for fragments for which the visibility information indicates that the fragments should not be processed further for the render output some or all of the processing during the second, main pass is omitted. The visibility information comprises the depth buffer.
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公开(公告)号：US20240169618A1
公开(公告)日：2024-05-23
申请号：US18509448
申请日：2023-11-15
Applicant: Arm Limited
Inventor： Ole Magnus Ruud , Sandeep Kakarlapudi , Tord Kvestad Øygard , Per Kristian Kjøll
Abstract: When performing tile-based rendering a first, pre-pass operation in which primitives for a tile are processed to determine visibility information, the visibility information usable to determine whether or not fragments for a primitive should subsequently be processed further for the render output, is performed. Thereafter a second, main pass operation is performed in which the further processing of fragments for primitives that were processed during the first, pre-pass operation is controlled based on the determined visibility information for the sequence of primitives, such that for fragments for which the visibility information indicates that the fragments should not be processed further for the render output some or all of the processing during the second, main pass is omitted. The visibility information indicates which primitives should be rendered for which sampling positions of the render output in a hierarchical manner.
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