公开(公告)号：US20150253839A1

公开(公告)日：2015-09-10

申请号：US14716983

申请日：2015-05-20

Applicant: Atmel Corporation

Inventor： Sebastien Jouin ,  Romain Oddoart ,  Patrice Menard ,  Mickael Le Dily ,  Thierry Gourbilleau

IPC: G06F1/32

CPC classification number: G06F1/3243 ,  G06F1/3287 ,  G06F13/1673 ,  Y02D10/152

Abstract: A microcontroller is operable in a low-power mode and includes one or more I/O connectors, as well as an I/O controller operable to provide control signals for controlling a state of a particular one of the I/O connectors. The I/O controller is powered off or deactivated during the low-power mode. The microcontroller also includes I/O connector state control logic operable to control the state of the particular one of the I/O connectors in accordance with the control signals from the I/O controller. The I/O connector state control logic includes I/O connector state retention logic that retains states of the control signals and maintains the particular I/O connector in a corresponding state in accordance with the retained control signals while the microcontroller is in the low-power mode.

Abstract translation: 微控制器在低功率模式下可操作并且包括一个或多个I / O连接器，以及I / O控制器，其可操作以提供用于控制I / O连接器中特定一个的状态的控制信号。 在低功耗模式下，I / O控制器关闭或关闭。 微控制器还包括I / O连接器状态控制逻辑，其可操作以根据来自I / O控制器的控制信号来控制特定I / O连接器的状态。 I / O连接器状态控制逻辑包括I / O连接器状态保持逻辑，其保持控制信号的状态，并且在微控制器处于低电平状态时，根据保留的控制信号将特定的I / O连接器保持在相应的状态， 电源模式。

公开(公告)号：US08775694B2

公开(公告)日：2014-07-08

申请号：US13624644

申请日：2012-09-21

Applicant: Atmel Corporation

Inventor： Frode Milch Pedersen ,  Romain Oddoart ,  Cedric Favier

IPC: G06F13/28 ,  G06F3/05

CPC classification number: G06F13/28 ,  H03M1/1215 ,  Y02D10/14

Abstract: A device comprises a central processing unit (CPU) and a memory configured for storing memory descriptors. The device also includes an analog-to-digital converter controller (ADC controller) configured for managing an analog-to-digital converter (ADC) using the memory descriptors. In addition, the device includes a direct memory access system (DMA system) configured for autonomously sequencing conversion operations performed by the ADC without CPU intervention by transferring the memory descriptors directly between the memory and the ADC controller for controlling the conversion operations performed by the ADC.

Abstract translation: 一种设备包括中央处理单元（CPU）和配置用于存储存储器描述符的存储器。 该器件还包括配置为使用存储器描述符管理模数转换器（ADC）的模拟 - 数字转换器控制器（ADC控制器）。 另外，该设备还包括直接存储器存取系统（DMA系统），其被配置为通过在存储器和ADC控制器之间直接传送存储器描述符来自动排序由ADC执行的转换操作，而无需CPU干预，以控制由ADC执行的转换操作 。

公开(公告)号：US20140089707A1

公开(公告)日：2014-03-27

申请号：US13788366

申请日：2013-03-07

Applicant: Atmel Corporation

Inventor： Sebastien Jouin ,  Romain Oddoart ,  Patrice Menard ,  Mickael Le Dily ,  Thierry Gourbilleau

IPC: G06F1/32

CPC classification number: G06F1/3243 ,  G06F1/3296 ,  Y02D10/152 ,  Y02D10/172

Abstract: A microcontroller system can operate in a number of power modes. In response to changing from a previous mode to a present mode, the microcontroller system reads a present calibration value correspond to the present mode from system configuration storage and write the present calibration value to a configuration register for a component. A logic block for the component reads the present calibration value and calibrates the component.

Abstract translation: 微控制器系统可以在多种功率模式下工作。 响应于从先前模式变为当前模式，微控制器系统从系统配置存储读取对应于当前模式的当前校准值，并将当前校准值写入组件的配置寄存器。 组件的逻辑块读取当前校准值并校准组件。