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公开(公告)号：US20220367530A1
公开(公告)日：2022-11-17
申请号：US17765304
申请日：2021-04-13
Inventor： Yongbo JU , Pengfei CUI , Jian SUN , Deshuai WANG , Xiangkai SHEN , Jianbin GAO , Jiannan WANG , Guangshuai WANG
IPC: H01L27/12 , H01L23/00 , G02F1/1345 , G02F1/1333 , G06F3/041 , G06F3/044
Abstract: An array substrate has a display area and a bonding area located on a side of the display area. The array substrate includes a base, a plurality of first transistors, a plurality of conductive pins and a plurality of conductive electrodes. The plurality of first transistors are disposed on a side of the base and located in the display area; a first transistor includes a first gate, a first source and a first drain. The plurality of conductive pins are disposed on the side of the base and located in the bonding area, and are disposed in a same layer as the first gate. The plurality of conductive electrodes are each disposed on a respective one of surfaces of the plurality of conductive pins away from the base.
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Patent Agency Ranking
公开(公告)号：US20180196545A1
公开(公告)日：2018-07-12
申请号：US15561559
申请日：2017-04-10
Inventor： Deshuai WANG , Xinyou Jl
Abstract: The present disclosure provides an in cell touch screen including a plurality of touch electrodes and a shade structure, wherein the shade structure includes a plurality of first shade bars arranged in parallel along a first direction and a plurality of second shade bars arranged in parallel along a second direction perpendicular to the first direction; and the first shade bars are conductive, and the touch electrodes are electrically connected to the first shade bars, respectively.
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公开(公告)号：US20230040448A1
公开(公告)日：2023-02-09
申请号：US17789768
申请日：2021-08-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jian ZHANG , Zhen WANG , Deshuai WANG , Han ZHANG , Wei YAN , Jian SUN
IPC: G09G3/32
Abstract: A display substrate and a display apparatus are provided. The display substrate includes a base substrate; sub-pixels arranged in an array and on the base substrate; data line groups on the base substrate; each data line group includes data lines, each of which is connected to one column of sub-pixels; data selectors on the base substrate and connected to the data line groups in a one-to-one correspondence; data lines in a same data line group are connected to a same data selector; and a data selection signal lines, wherein different data selection signal lines output different data selection signals; and different data lines connected to a same data selector correspond to different data selection signal lines, respectively. The display panel provided may effectively reduce the resistance on the data selection signal lines, thereby reducing the delay of the data selection signals and further improving the charging uniformity of sub-pixels.
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公开(公告)号：US20220317535A1
公开(公告)日：2022-10-06
申请号：US17427622
申请日：2020-10-22
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jian ZHANG , Zhen WANG , Deshuai WANG , Han ZHANG , Wei YAN , Jian SUN
IPC: G02F1/1362
Abstract: The present disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes: a display area and a peripheral area surrounding the display area; the display area is provided with a plurality of gate lines and a plurality of data lines, the gate lines and the data lines are crossed to define a plurality of sub-pixel regions distributed in an array; a first electrode, the first electrode including a first portion located in the display area and a second portion located in the peripheral area; an electrode connection line, the electrode connection line is located in the peripheral area, the electrode connection line is electrically connected to the second portion; a plurality of compensation signal lines, at least part of the compensation signal lines are located in the display area, and the compensation signal lines are electrically connected to the first portion.
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公开(公告)号：US20160252806A1
公开(公告)日：2016-09-01
申请号：US14769766
申请日：2015-04-14
Inventor： Deshuai WANG , Liang WANG
IPC: G03F1/50
Abstract: The present disclosure relates to the field of photolithography technologies. Disclosed is a mask comprising a transparent substrate, the transparent substrate being provided thereon with a semi-transmitting film layer and a light barrier layer to form a non-transmitting region, a semi-transmitting region, and a full transmitting region, the transparent substrate being further provided with a light extinction film layer located at a vicinity of the full transmitting region to weaken an intensity of ultraviolet light transmitting through the vicinity of the full transmitting region. The size of the via formed after an exposure process with the mask is less affected by a change in the thickness of the photoresist surrounding the via.
Abstract translation: 本公开涉及光刻技术领域。 公开了一种包括透明基板的掩模，所述透明基板上设置有半透膜层和遮光层以形成非透射区域，半透射区域和全透射区域，所述透明基板 还设置有位于全透射区域附近的消光膜层，以减弱通过全透射区域附近透射的紫外光的强度。 在通过掩模进行曝光处理之后形成的通孔的尺寸较少受到通孔周围的光致抗蚀剂厚度的变化的影响。
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公开(公告)号：US20160018726A1
公开(公告)日：2016-01-21
申请号：US14547399
申请日：2014-11-19
Inventor： Deshuai WANG , Lianjie QU
IPC: G03F1/00
Abstract: A mask, comprising an opaque region, a first semi-transparent region, and a second semi-transparent region. The transmittance of the second semi-transparent region is less than that of the first semi-transparent region. The mask solves the over-etching problem caused by the difference between the thicknesses of photoresist in different regions.
Abstract translation: 一种掩模，包括不透明区域，第一半透明区域和第二半透明区域。 第二半透明区域的透射率小于第一半透明区域的透射率。 该掩模解决了由不同区域中的光致抗蚀剂的厚度之差引起的过蚀刻问题。
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