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公开(公告)号:US20240105112A1
公开(公告)日:2024-03-28
申请号:US18519614
申请日:2023-11-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Jian ZHANG , Zhen WANG , Deshuai WANG , Han ZHANG , Wei YAN , Jian SUN
IPC: G09G3/32
CPC classification number: G09G3/32 , G09G2310/0275 , G09G2310/0297 , G09G2310/08
Abstract: A display substrate and a display apparatus are provided. The display substrate includes a base substrate; sub-pixels arranged in an array and on the base substrate; data line groups on the base substrate; each data line group includes data lines, each of which is connected to one column of sub-pixels; data selectors on the base substrate and connected to the data line groups in a one-to-one correspondence; data lines in a same data line group are connected to a same data selector; and data selection signal lines, wherein different data selection signal lines output different data selection signals; and different data lines connected to a same data selector correspond to different data selection signal lines, respectively. The display panel provided may effectively reduce the resistance on the data selection signal lines, thereby reducing the delay of the data selection signals and further improving the charging uniformity of sub-pixels.
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2.
公开(公告)号:US20240038182A1
公开(公告)日:2024-02-01
申请号:US17639166
申请日:2021-04-26
Inventor: Shou LI , Hengyu YAN , Wenyu LI , Zhiming MENG , Jian ZHANG , Zhanchang BU
IPC: G09G3/34
CPC classification number: G09G3/342 , G09G2370/00
Abstract: The present disclosure provides a backlight data transmission method including: receiving, in response to a first vertical synchronization signal of a current image frame sent from a logic circuit board, an entire of backlight data sent from the logic circuit board during a first preset time period, where the entire backlight data includes backlight data corresponding to backlight regions, and duration of the first preset time period is longer than duration of the first vertical synchronization signal in an active level state during one period; and sending the entire backlight data to a backlight driving module during a second preset time period after the first preset time period, where a sum of the duration of the first preset time period and duration of the second preset time period is less than a period of the first vertical synchronization signal.
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公开(公告)号:US20220165197A1
公开(公告)日:2022-05-26
申请号:US17515196
申请日:2021-10-29
Inventor: Zhenguo ZHOU , Xuewen CAO , Site CAI , Jian REN , Xiaoping ZHANG , Litao FAN , Xiaojuan GAO , Jian ZHANG , Shuqian DOU , Yingxue YU , Yujie LIU , Dongxu YANG , Yaodong WANG , Luo ZHANG , Siqi YIN , Xianfeng MAO , Mengxing XU
IPC: G09G3/20
Abstract: A method for driving display panel includes: for one of adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by a data selector;
when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; first and second orders each represents an order of inputting data signals to the data lines; first order is opposite to second order; for the other of the adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by the data selector.-
公开(公告)号:US20210149262A1
公开(公告)日:2021-05-20
申请号:US16642596
申请日:2019-01-04
Inventor: Yun QIAO , Han ZHANG , Kai CHEN , Zhen WANG , Zhengkui WANG , Wenwen QIN , Wei YAN , Jian ZHANG , Xiaozhou ZHAN , Deshuai WANG , Jian SUN
IPC: G02F1/1362 , G02F1/1339
Abstract: A liquid crystal display panel and a display device. The liquid crystal display panel includes a display region and an opening region in the display region; the display region includes a plurality of sub-pixels, the display region includes a first edge and a second edge opposite to the first edge, the display region includes a first region between the opening region and the first edge and a second region between the opening region and the second edge, an orthographic projection of the opening region on the first edge respectively coincides with orthographic projections of the first region and the second region on the first edge, the plurality of sub-pixels comprise a main sub-pixel in the first region and a secondary sub-pixel in the second region, and an area of the main sub-pixel is smaller than an area of the secondary sub-pixel.
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公开(公告)号:US20160104727A1
公开(公告)日:2016-04-14
申请号:US14751854
申请日:2015-06-26
Inventor: Zhenfei CAI , Jian ZHANG , Xingxing SONG
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L23/544 , H01L27/1222 , H01L2223/5442 , H01L2223/54426
Abstract: Embodiments of the disclosure provide an array substrate and a manufacture method thereof. The array substrate comprises a display region and a non-display region, the display region comprises a transistor, the transistor comprises a source electrode, a drain electrode and an active layer, the source electrode and the drain electrode are provided on the active layer and are respectively provided at two ends of the active layer. The non-display region is provided with an alignment mark, the alignment mark is provided in a same layer as the active layer and is configured for aligning the source electrode and the drain electrode with the active layer in the case of re-fabricating the source electrode and the drain electrode.
Abstract translation: 本公开的实施例提供阵列基板及其制造方法。 阵列基板包括显示区域和非显示区域,显示区域包括晶体管,晶体管包括源电极,漏电极和有源层,源电极和漏电极设置在有源层上, 分别设置在有源层的两端。 非显示区域设置有对准标记,对准标记设置在与有源层相同的层中,并且被配置为在重新制造源的情况下将源电极和漏极与活性层对准 电极和漏电极。
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6.
公开(公告)号:US20250015093A1
公开(公告)日:2025-01-09
申请号:US18546693
申请日:2022-09-01
Inventor: Xiaojuan GAO , Boning WANG , Litao FAN , Yangli ZHENG , Jian REN , Xiaoping ZHANG , Gaowei CHEN , Fangyi LIU , Shuqian DOU , Yaodong WANG , Jian ZHANG , Zhenguo ZHOU , Naiqi MEN , Luo ZHANG , Yingxue YU , Siqi YIN
Abstract: The present disclosure provides a connection structure, a display panel, a manufacturing method, a detection circuitry and a display device. The connection structure includes a connection unit. The connection unit includes a first connection member, a second connection member, and a binding member. The first connection member includes a plurality of first connectors, the second connection member includes a plurality of second connectors, the binding member includes a plurality of binding pins, the connection unit includes a plurality of metal layers and a plurality of insulation layers, the second connector includes a second connection line, the second connection line includes at least two second connection line portions electrically coupled to each other, and at least two insulation layers in the connection unit are arranged on a side of the at least two metal layers away from the base substrate.
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公开(公告)号:US20240258335A1
公开(公告)日:2024-08-01
申请号:US18630971
申请日:2024-04-09
Applicant: BOE Technology Group Co., Ltd.
Inventor: Jiguo WANG , Jian SUN , Zhao ZHANG , Liang TIAN , Weida QIN , Zhen WANG , Han ZHANG , Wenwen QIN , Xiaoyan YANG , Yue SHAN , Wei YAN , Jian ZHANG , Deshuai WANG , Yadong ZHANG , Jiantao LIU
IPC: H01L27/12 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/136209 , G02F1/136213 , G02F1/136222 , G02F1/13629 , G02F1/1368 , H01L27/1255
Abstract: An array substrate includes: a first substrate (10), including a plurality of sub-pixel regions (101) arranged in an array along a row direction (X) and a column direction (Y); a pixel circuit layer, including a plurality of sub-pixel circuits; and a planarization layer (17), provided with a first via hole (170) located in the sub-pixel regions (101), and includes at least one pattern portion (171), the pattern portion (171) includes a plurality of pattern units (171a) arranged in an array along the row direction (X) and the column direction (Y); where the pattern unit (171a) further includes a second bump (1712) located within a central area surrounded by each of the first bumps (1710), and the spacing groove (1711) on a same side of the first bump (1710) and the second bump (1712) is arranged in a non-straight shape.
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公开(公告)号:US20240212772A1
公开(公告)日:2024-06-27
申请号:US17794991
申请日:2021-09-28
Applicant: BOE Technology Group Co., Ltd.
Inventor: Wei YAN , Zhen WANG , Wenwen QIN , Han ZHANG , Deshuai WANG , Jian ZHANG , Yue SHAN , Xiaoyan YANG , Yadong ZHANG , Jian SUN
CPC classification number: G11C19/28 , G09G3/20 , G09G2310/0286
Abstract: A shift register and a driving method therefor, a gate driving circuit and a display device are provided, wherein the shift register includes a pull-up control sub-circuit configured to provide a signal of a first signal terminal or a second signal terminal to a pull-up control node under control of a first input terminal and a second output terminal; the pull-down control sub-circuit is configured to provide a signal of a first power supply terminal or a second power supply terminal to a pull-down node under control of the pull-up control node, the first signal terminal, the second signal terminal, a first clock signal terminal and a second clock signal terminal; the output sub-circuit is configured to supply a signal of a third clock signal terminal to a first output terminal and a signal of a fourth clock signal terminal to the second output terminal.
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9.
公开(公告)号:US20240170628A1
公开(公告)日:2024-05-23
申请号:US17786975
申请日:2021-07-30
Inventor: Chunjian LIU , Wei HAO , Zouming XU , Jian TIAN , Xintao WU , Jie LEI , Jie WANG , Jianying ZHANG , Wenjin FAN , Jiawei XU , Le LI , Jian ZHANG
CPC classification number: H01L33/62 , H01L25/167
Abstract: The present disclosure provides a light-emitting substrate and a manufacturing method thereof, a backlight and a display device. The light-emitting substrate includes a substrate including a plurality of light-emitting regions arranged in an array, each of the plurality of light-emitting regions including a driving circuit and at least one light-emitting unit connected to the driving circuit, a first electrically conductive portion on the substrate and connected to the driving circuit and the at least one light-emitting unit in each light-emitting region, and a second electrically conductive portion on the substrate and including a plurality of pads. The first electrically conductive portion and the second electrically conductive portion are on a same layer.
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公开(公告)号:US20240105140A1
公开(公告)日:2024-03-28
申请号:US17768828
申请日:2021-04-20
Inventor: Shou LI , Xingliang LI , Liugang ZHOU , Jian ZHANG , Zhanchang BU , Hui ZHANG , Hongli YUE
IPC: G09G3/36 , G02F1/1335 , G02F1/1362
CPC classification number: G09G3/3696 , G02F1/133512 , G02F1/133514 , G02F1/136286
Abstract: A display panel (20), a display device and a debugging method thereof are provided. The display panel (20) includes: a base substrate (1), including a display region (A) and a non-display region (B) surrounding the display region (A). the non-display region (B) including a binding region (C) located on one side of the display region (A); and a plurality of sub-pixels (2), located in the display region (A). Areas of pixel aperture regions of the plurality of sub-pixels (2) tend to increase in a direction from the binding region (C) to the display region (A).
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