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公开(公告)号：US20210405410A1
公开(公告)日：2021-12-30
申请号：US17351384
申请日：2021-06-18
Inventor： Chunhua WANG , Rui HAN , Jie YU , Pengtao LI , Tielei ZHAO , Tingfeng HUANG , Meng LI , Shulin QIN , Yaoyao WANG , Xiaoxia WANG , Xiaoqiao DONG
IPC: G02F1/1368 , B60R11/02 , G02F1/1362 , G09G3/34
Abstract: The present disclosure provides a display substrate and a display device, belonging to the field of display technology, which can solve the problem that a splicing gap between existing adjacent display substrates of a spliced screen is relatively wide, and a narrow-bezel display cannot be realized. The display substrate of the present disclosure has a display area and a non-display area surrounding the display area; the display substrate includes a base and a plurality of pixel units located on the base and arranged in the display area; each of the pixel units includes a pixel circuit. The display substrate further includes: a light detection circuit located on the base and arranged in the non-display area; where the light detection circuit is configured to detect brightness of ambient light.
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公开(公告)号：US20210384288A1
公开(公告)日：2021-12-09
申请号：US17287997
申请日：2020-08-07
Inventor： Meng LI , Yongqian LI , Zhidong YUAN , Can YUAN
IPC: H01L27/32
Abstract: A pixel structure includes: gate lines and data lines disposed crosswise and a plurality of pixel repetition modules distributed in an array. A pixel repetition module includes: a plurality of pixel units arranged in order, wherein each pixel unit includes three sub-pixels arranged in a triangular structure, and the three sub-pixels in each pixel unit and the three sub-pixels in an adjacent pixel unit are arranged inversely with respect to each other; each pixel unit corresponds to two groups of gate lines, wherein each group of gate lines includes two gate lines parallel to each other, a first group of gate lines are located on a first outer side and a second outer side of the pixel units respectively, and a second group of gate lines are both located between the sub-pixels located in a first row and the sub-pixels located in a second row in the pixel units.
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公开(公告)号：US20210225253A1
公开(公告)日：2021-07-22
申请号：US16312101
申请日：2018-01-04
Inventor： Meng LI , Yongqian LI , Zhidong YUAN , Can YUAN , Zhenfei CAI , Xuehuan FENG
IPC: G09G3/20 , G09G3/3258
Abstract: Embodiments of the present disclosure provide a shift register unit and a driving method thereof, and a gate driving circuit. The shift register unit includes an input circuit, a next-stage start circuit, a control circuit, a stabilization circuit, and at least one output circuit. The at least one output circuit each can control a voltage of a signal output terminal according to a voltage of a pull-up node, a voltage of a pull-down node, a first voltage signal, a control clock signal from a control clock signal terminal, and a control voltage signal from a control voltage signal terminal. A high level of a second clock signal begins when a high level of a first clock signal ends, and a high level of a third clock signal begins when a high level of the second clock signal ends.
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公开(公告)号：US20210201807A1
公开(公告)日：2021-07-01
申请号：US16766450
申请日：2019-11-04
Inventor： Xuehuan FENG , Yongqian LI , Can YUAN , Meng LI , Zehua DING , Zhidong YUAN
IPC: G09G3/3266 , G09G3/3225 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-unit and a leakage prevention circuit; the first sub-unit includes a first input circuit and a first output circuit. The first input circuit controls a level of a first node in response to a first input signal, the first output circuit provides an output signal at an output terminal under control of the level of the first node, the leakage prevention circuit is connected to the first node and a first voltage terminal, and controls a level of a leakage prevention node under control of the level of the first node, whereby a conductive path is formed between the leakage prevention node and the first voltage terminal, and a circuit connected between the first node and the leakage prevention node is turned off.
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15.发明申请公开(公告)号：US20210150988A1
公开(公告)日：2021-05-20
申请号：US16642469
申请日：2019-07-29
Inventor： Zhidong YUAN , Yongqian LI , Meng LI , Can YUAN
IPC: G09G3/3266 , G11C19/28
Abstract: The present disclosure discloses a shift register, a driving method thereof, a gate drive circuit, an array substrate and a display device. With a signal control circuit, a branch control circuit, a cascade signal output circuit and at least two scan signal output circuits, each shift register can output at least two scan signals to correspond to different gate lines in a display panel. This can reduce the number of shift registers in a gate drive circuit and the space occupied by the gate drive circuit and can achieve an ultra-narrow frame design, as compared with an existing shift register that can only output one scan signal. Moreover, as signals of different output control node do not influence each other, the output stability can also be improved.
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Patent Agency Ranking
公开(公告)号：US20210134203A1
公开(公告)日：2021-05-06
申请号：US16839858
申请日：2020-04-03
Inventor： Ying WANG , Meng LI , Jing LI , Hongmin LI
IPC: G09G3/20
Abstract: A shift register, a method for driving the same, a gate driving circuit and a display device are provided. The shift register includes an input sub-circuit, an output sub-circuit, a reset sub-circuit, and a first shift output sub-circuit to an m-th shift output sub-circuit. The i-th shift output sub-circuit is connected with a third node, an (i−1)-th shift node, an i-th shift node, an (i+1)-th clock signal terminal, a first power terminal, a second power terminal, an (i−1)-th shift signal output terminal and an i-th shift signal output terminal, and is configured to supply a signal of the first power terminal to the i-th shift signal output terminal and a signal of the second power terminal to the (i−1)-th shift signal output terminal and the (i−1)-th shift node under control of the (i+1)-th clock signal terminal, i being an integer between 2 and m.
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公开(公告)号：US20210118347A1
公开(公告)日：2021-04-22
申请号：US16840152
申请日：2020-04-03
Inventor： Ying WANG , Meng LI , Aifeng GAO , Hongmin LI
Abstract: A shift register, a method for driving the same, a gate driving circuit and a display device are provided. The shift register includes an input sub-circuit, a pull-down control sub-circuit, an output sub-circuit and a reset sub-circuit. The pull-down control sub-circuit is connected to a first signal input terminal, a pull-up node, a pull-down node and a first power terminal, and is configured to supply a first voltage signal of the first power terminal to the pull-down node under the control of the first input signal and a potential of the pull-up node. The output sub-circuit is connected to the first node and a second clock signal terminal, and is configured to output a second clock signal of the second clock signal terminal to a first output terminal and a second output terminal under the control of the potential of the pull-up node.
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公开(公告)号：US20210074210A1
公开(公告)日：2021-03-11
申请号：US16840176
申请日：2020-04-03
Inventor： Zhidong YUAN , Taejin KIM , Yongqian LI , Lin SUN , Chao JIAO , Can YUAN , Zehua DING , Xuehuan FENG , Meng LI
IPC: G09G3/3233
Abstract: A pixel driving circuit, array substrate, display device and method for driving the pixel driving circuit are provided, the circuit includes: a control terminal and a first terminal of a driving switch circuit are respectively coupled to a first terminal of a data input switch circuit and an anode of a light-emitting device, and two terminals of a storage capacitor are respectively coupled to the control terminal of the driving switch circuit and the anode of the light-emitting device, two terminals of an intrinsic capacitor are respectively coupled to a cathode and the anode of the light-emitting device, a first terminal and a second terminal of a reset switch circuit are respectively coupled to the anode and the cathode of the light-emitting device, a capacitance of the intrinsic capacitor is greater than or equal to a preset multiple of a capacitance of the storage capacitor.
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公开(公告)号：US20200090571A1
公开(公告)日：2020-03-19
申请号：US16443325
申请日：2019-06-17
Inventor： Meng LI , Yongqian LI , Zhidong YUAN , Can YUAN
IPC: G09G3/20
Abstract: The present disclosure provides a gate driving circuit and a driving method thereof as well as a display device. The gate driving circuit comprises a driving circuit connected to a gate line for outputting a gate scanning signal; and a detecting circuit connected to the gate line for collecting and recording the gate scanning signal.
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公开(公告)号：US20190156778A1
公开(公告)日：2019-05-23
申请号：US15772677
申请日：2017-09-15
Inventor： Meng LI , Yongqian LI , Pan XU , Miao ZHANG
Abstract: The present application provides a shift register circuit, a gate driving circuit including the shift register circuit, and a driving method applied to the shift register circuit. The shift register circuit includes an input sub-circuit, an output sub-circuit, an output reset sub-circuit, and a first capacitor, wherein the first capacitor is connected between the pull-up node and the second clock signal terminal, and configured to maintain a high level at the pull-up node through the second clock signal input at the second clock signal terminal. The shift register circuit further includes a second capacitor connected between the pull-down node and a first voltage input terminal, and configured to pull down a level at the pull-down node through a reverse bias voltage input at the first voltage input terminal during a blanking time after a frame of scanning ends.
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