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公开(公告)号：US20210193035A1
公开(公告)日：2021-06-24
申请号：US16982024
申请日：2020-04-02
发明人： Meng LI , Min HE , Zhidong YUAN , Can YUAN , Haixia XU
IPC分类号： G09G3/3233
摘要： The present disclosure provides a display panel and a driving method thereof, and a display apparatus. The display panel includes: a plurality of sub-pixels arranged in an array, a plurality of data lines, and a plurality of compensation detection lines, wherein each data line is coupled with sub-pixels in one column; sub-pixels in every three columns serve as one first sub-pixel group, and each first sub-pixel group corresponds to two compensation detection lines which include a first detection line and a second detection line; and in each first sub-pixel group, sub-pixels in the first column are coupled with the first detection line, sub-pixels in the third column are coupled with the second detection line, and sub-pixels in the second column are alternatively coupled with the first detection line and the second detection line.
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公开(公告)号：US20200035315A1
公开(公告)日：2020-01-30
申请号：US16504652
申请日：2019-07-08
发明人： Zhidong YUAN , Yongqian LI , Can YUAN , Meng LI , Xuelian CHENG
摘要： A shift register unit includes an input module, a first output module, a first pull-down module, a reset module, and a leakage-proof module. The input module is coupled to a pull-up node, a control signal terminal, and an input signal terminal. The first output module is coupled to the pull-up node, a first output terminal, and a second clock signal terminal. The first pull-down module is coupled to the first output terminal, a first signal terminal, and a first clock signal terminal. The reset module is coupled to a reset signal terminal, the pull-up node, and the first output terminal. The leakage-proof module is coupled to a second signal terminal, the first node, and the pull-up node.
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公开(公告)号：US20190096326A1
公开(公告)日：2019-03-28
申请号：US15991172
申请日：2018-05-29
发明人： Zhidong YUAN , Yongqian LI , Can YUAN , Meng LI , Xuehuan FENG , Zhenfei CAI
IPC分类号： G09G3/3241 , G09G3/3258 , H01L27/32
CPC分类号： G09G3/3241 , G09G3/3233 , G09G3/3258 , G09G2300/0852 , G09G2300/0861 , G09G2310/0251 , G09G2320/0204 , G09G2320/0295 , G09G2320/043 , H01L27/3265
摘要： The present disclosure relates to a pixel compensation circuit, a driving method for the pixel compensation circuit, a display panel and a display device. The pixel compensation circuit includes a reset circuit, a data writer, a compensation circuit, a driver, and a light emitting device. The threshold voltage of the light emitting device may be provided to the driver through the compensation circuit.
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公开(公告)号：US20210193001A1
公开(公告)日：2021-06-24
申请号：US16072049
申请日：2018-01-08
发明人： Xuehuan FENG , Xing ZHANG , Qi HU , Pan XU , Yongqian LI , Meng LI , Zhidong YUAN , Zhenfei CAI , Can YUAN
摘要： The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.
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公开(公告)号：US20200211436A1
公开(公告)日：2020-07-02
申请号：US16550848
申请日：2019-08-26
发明人： Zhidong YUAN , Yongqian LI , Can YUAN
摘要： A shift register of the present disclosure includes: an input sub-circuit configured to transmit an input signal from an input signal terminal to a feedback node under the control of a first clock signal terminal; a pull-up control sub-circuit configured to transmit a feedback signal of the feedback node to a pull-up node under the control of the first clock signal terminal; a feedback sub-circuit configured to transmit a first voltage signal from a first voltage signal terminal to the feedback node under the control of the pull-up node; an output sub-circuit configured to transmit a second clock signal from a second clock signal terminal to the output signal terminal under the control of the pull-up node; and a pull-down circuit configured to transmit a second voltage signal from a second voltage signal terminal to the output signal terminal under the control of the first clock signal terminal.
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6.发明申请公开(公告)号：US20190103166A1
公开(公告)日：2019-04-04
申请号：US15971039
申请日：2018-05-04
发明人： Zhidong YUAN , Can YUAN , Zhenfei CAI
摘要： A shift register unit, a driving method thereof, a gate driving circuit and a display device are provided. The shift register unit includes: an input circuit configured to control a voltage applied to a first pull-up node; a timing controller circuit coupled to the first pull-up node and a second pull-up node, and configured to control a voltage applied to the second pull-up node based on the voltage applied to the first pull-up node; a first output circuit configured to control a voltage applied to a first output end; a second output circuit configured to control a voltage applied to a second output end; a pull-down control circuit configured to control a voltage applied to a pull-down node; a first pull-down circuit configured to control the voltage applied to the first pull-up node; and a second pull-down circuit configured to control the voltage applied to the second pull-up node.
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7.发明申请公开(公告)号：US20180308404A1
公开(公告)日：2018-10-25
申请号：US15825885
申请日：2017-11-29
发明人： Hao SHANG , Zhidong YUAN , Tao ZHANG
IPC分类号： G09G3/00 , G09G3/3266
CPC分类号： G09G3/006 , G09G3/3266 , G09G2310/0202 , G09G2310/08
摘要： A scanning direction control circuit includes a selection control circuit configured to output a first control signal to a start signal reception control circuit and output a second control signal to a direction control circuit; the start signal reception control circuit configured to, under the control of the first control signal, enable a scanning pulse signal input end to be electrically coupled to a forward scanning start signal input end during forward scanning, and enable the scanning pulse signal input end to be electrically coupled to a backward scanning start signal input end during backward scanning; and the direction control circuit configured to, under the control of the second control signal, output a forward scanning control signal to a scanning direction control end during forward scanning, and output a backward scanning control signal to the scanning direction control end during backward scanning.
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公开(公告)号：US20200302854A1
公开(公告)日：2020-09-24
申请号：US16619757
申请日：2019-06-06
发明人： Can YUAN , Yongqian LI , Zhidong YUAN , Meng LI
IPC分类号： G09G3/20
摘要： The present disclosure provides a gate driving circuit and a driving method, and a display device. The gate driving circuit includes: a plurality of first gate driving units, ith first gate driving unit being configured to output a first gate driving signal to ith row of gate line in a display phase; a plurality of first control modules, mth first control module being configured to control mth second gate driving unit to output a second gate driving signal to mth row of gate line in a vertical blanking phase; nth first control module being configured to control nth second gate driving unit not to output the second gate driving signal in the vertical blanking phase; a plurality of second control modules, kth second control module being configured to control kth second gate driving unit not to output the second gate driving signal in the vertical blanking phase.
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公开(公告)号：US20200066210A1
公开(公告)日：2020-02-27
申请号：US16424521
申请日：2019-05-29
发明人： Zhidong YUAN , Can YUAN , Yongqian LI
IPC分类号： G09G3/3266 , G11C19/28 , H03K17/687
摘要： The present disclosure discloses a gate drive output stage circuit, a gate driving unit, and a drive method. The gate drive output stage circuit includes: a first control sub-circuit configured to transmit a start signal of a compensation driving terminal to a first node; a second control sub-circuit configured to transmit a first clock signal of a first clock terminal to a control node when the first node is at an effective level; a first output sub-circuit configured to transmit a second clock signal of a second clock terminal to a first output terminal when the control node is at an effective level; and a second output sub-circuit configured to transmit a first power supply voltage signal of a first power supply voltage terminal to a second output terminal when the control node is at the effective level.
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公开(公告)号：US20210384288A1
公开(公告)日：2021-12-09
申请号：US17287997
申请日：2020-08-07
发明人： Meng LI , Yongqian LI , Zhidong YUAN , Can YUAN
IPC分类号： H01L27/32
摘要： A pixel structure includes: gate lines and data lines disposed crosswise and a plurality of pixel repetition modules distributed in an array. A pixel repetition module includes: a plurality of pixel units arranged in order, wherein each pixel unit includes three sub-pixels arranged in a triangular structure, and the three sub-pixels in each pixel unit and the three sub-pixels in an adjacent pixel unit are arranged inversely with respect to each other; each pixel unit corresponds to two groups of gate lines, wherein each group of gate lines includes two gate lines parallel to each other, a first group of gate lines are located on a first outer side and a second outer side of the pixel units respectively, and a second group of gate lines are both located between the sub-pixels located in a first row and the sub-pixels located in a second row in the pixel units.
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