公开(公告)号：US11222565B2

公开(公告)日：2022-01-11

申请号：US16072049

申请日：2018-01-08

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Inventor： Xuehuan Feng ,  Xing Zhang ,  Qi Hu ,  Pan Xu ,  Yongqian Li ,  Meng Li ,  Zhidong Yuan ,  Zhenfei Cai ,  Can Yuan

IPC: G09G3/20 ,  G11C19/28

Abstract: The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.

公开(公告)号：US20210335203A1

公开(公告)日：2021-10-28

申请号：US16618106

申请日：2019-07-02

Applicant: Hefei BOE Joint Technology Co.,Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Xuehuan Feng ,  Yongqian Li ,  Xing Zhang

IPC: G09G3/20

Abstract: The present application discloses a shift-register unit. The shift-register unit includes a first sub-unit including a first input circuit coupled via a first node to a first output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal and the first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. Additionally, the shift-register unit includes a second sub-unit including a second input circuit coupled via a second node to a second output circuit. The second input circuit is configured to control a voltage level of the second node in response to the first input signal and the second output circuit is configured to output a second output signal in response to the voltage level of the second node.

公开(公告)号：US20180294360A1

公开(公告)日：2018-10-11

申请号：US15822429

申请日：2017-11-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jianye Zhang ,  Wei Li ,  Xing Zhang

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  C08G77/04 ,  C08G77/26 ,  G03F7/075 ,  G03F7/038

Abstract: The present disclosure provides a top-gate thin film transistor, a manufacturing method thereof, and an array substrate and a display panel each comprising the top-gate thin film transistor. The top-gate thin film transistor comprises a light-shielding layer formed between the base substrate and the active layer and made of a non-metallic material. The non-metallic material may be a silicone material, such as a polyhedral oligomeric silsesquioxane or a linear silicone resin.

公开(公告)号：US20250037667A1

公开(公告)日：2025-01-30

申请号：US18696855

申请日：2023-02-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xing Zhang ,  Pan Xu ,  Ying Han ,  Chengyuan Luo ,  Donghui Zhao ,  Guangshuang Lv ,  Cheng Xu

IPC: G09G3/3266 ,  G09G3/32 ,  G09G3/3233 ,  G09G3/36

Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.

公开(公告)号：US12133428B2

公开(公告)日：2024-10-29

申请号：US17753513

申请日：2021-03-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xing Zhang ,  Zhan Gao ,  Yicheng Lin ,  Pan Xu ,  Ying Han ,  Guoying Wang ,  Dacheng Zhang

IPC: H01L35/24 ,  H01L51/00 ,  H10K59/126 ,  H10K59/131 ,  H10K59/38 ,  H10K59/80

CPC classification number: H10K59/126 ,  H10K59/131 ,  H10K59/38 ,  H10K59/87

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a light-shielding layer. The base substrate includes a display region including repeating units, each repeating unit includes a transparent region and a pixel region, the pixel region includes sub-pixels, each sub-pixel includes a sub-pixel driving circuit and a light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting layer located between the first electrode and the second electrode. The light-shielding layer is located on a side of the sub-pixel driving circuit close to the base substrate, at least part of an orthographic projection of the light-shielding layer on a main surface of the base substrate overlaps with an orthographic projection of the sub-pixel driving circuit on the main surface of the base substrate, and the light-shielding layer is connected with the second electrode.

公开(公告)号：US20240194688A1

公开(公告)日：2024-06-13

申请号：US17904748

申请日：2021-10-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guoying Wang ,  Pan Xu ,  Dacheng Zhang ,  Xing Zhang ,  Ying Han ,  Chengyuan Luo ,  Zhen Song

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1248

Abstract: An array substrate having a connection pad in a connection pad area is provided. The connection pad includes a plurality of first probe contact pads, a plurality of second probe contact pads, a plurality of first connection lines coupled to the plurality of first probe contact pads, respectively, and a plurality of second connection lines coupled to the plurality of second probe contact pads, respectively; the plurality of first connection lines and the plurality of second connection lines being in two different layers. A total number of conductive layers electrically connected to a respective first connection line of the plurality of first connection lines is different from a total number of conductive layers electrically connected to a respective second connection line of the plurality of second connection lines.

公开(公告)号：US12004385B2

公开(公告)日：2024-06-04

申请号：US17418814

申请日：2020-11-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ying Han ,  Yicheng Lin ,  Pan Xu ,  Xing Zhang ,  Zhan Gao ,  Guang Yan

IPC: H10K59/13 ,  H10K59/122 ,  H10K59/124 ,  H10K59/131 ,  H10K59/38 ,  H10K71/00 ,  H10K59/12

CPC classification number: H10K59/13 ,  H10K59/122 ,  H10K59/124 ,  H10K59/131 ,  H10K59/38 ,  H10K71/00 ,  H10K59/1201

Abstract: Provided is a display substrate including a substrate, and a light-emitting device and an optical compensation structure which are located on the substrate. The optical compensation structure includes a photoelectric sensor, a transistor and a capacitor, and the photoelectric sensor is electrically connected to the transistor and the capacitor respectively. The photoelectric sensor includes a first electrode, a photosensitive layer located on a side of the first electrode distal from the substrate, and a second electrode located on a side of the photosensitive layer distal from the substrate; the transistor includes a source electrode, a drain electrode, a gate electrode and an active layer; and the capacitor includes a first electrode plate and a second electrode plate located on a side of the first electrode plate distal from the substrate.

公开(公告)号：US11900885B2

公开(公告)日：2024-02-13

申请号：US17908021

申请日：2021-09-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying Han ,  Xuehuan Feng ,  Yicheng Lin ,  Pan Xu ,  Guoying Wang ,  Xing Zhang ,  Zhan Gao ,  Mingi Chu

IPC: G09G3/32 ,  G09G3/3266 ,  H10K59/121 ,  H10K59/131 ,  G09G3/3275 ,  G11C19/28 ,  H01L27/12

CPC classification number: G09G3/3266 ,  G09G3/3275 ,  G11C19/28 ,  H01L27/124 ,  H10K59/1213 ,  H10K59/1216 ,  H10K59/1315 ,  G09G2300/0842 ,  G09G2310/0278 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2320/0233

Abstract: A display panel includes: a substrate, sub-pixels and a gate drive circuit. The sub-pixel includes a pixel drive circuit. The gate drive circuit includes cascaded shift registers, and a shift register is electrically connected to pixel drive circuits in a row of sub-pixels. The gate drive circuit further includes cascade input signal lines and cascade display reset signal lines. The cascade input signal line is configured to connect a shift signal terminal and an input signal terminal of two different shift register, and the cascade display reset signal line is configured to connect a shift signal terminal and a display reset signal terminal of two different shift register. The display panel has sub-pixel regions for arranging the sub-pixels and first gap regions each located between two adjacent columns of sub pixel regions: the cascade display reset signal lines and the cascade input signal lines are disposed in different first gap regions.

公开(公告)号：US20230306892A1

公开(公告)日：2023-09-28

申请号：US18325140

申请日：2023-05-30

Applicant: Hefei BOE Joint Technology Co.,Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Xuehuan Feng ,  Yongqian Li ,  Xing Zhang

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08

Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.

公开(公告)号：US11705047B2

公开(公告)日：2023-07-18

申请号：US17721234

申请日：2022-04-14

Applicant: Hefei BOE Joint Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Xuehuan Feng ,  Yongqian Li ,  Xing Zhang

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08

Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.