Abstract:
Embodiments of the present invention disclose an array substrate and a method of manufacturing the same, and a liquid crystal display screen. The array substrate comprises gate lines, data lines arranged to intersect the gate lines, common electrode signal lines, and a plurality of pixels defined by the gate lines and the data lines, wherein each pixel comprises a drive transistor, a pixel electrode connected with one of a source electrode and a drain electrode of the drive transistor while the other one of the source electrode and the drain electrode of the drive transistor is connected with the respective data line, and a common electrode electrically connected with the respective common electrode signal line, and, the common electrode signal lines and the gate lines are formed in the same layer and extend in the same direction as the gate lines, wherein each pixel further comprises a common electrode connection line formed in the same layer as the respective common electrode signal line and extending in a direction of the respective data line, and the common electrode connection line is electrically connected with the respective common electrode signal line and the respective common electrode. Embodiments of the present invention is made so that the pixel resistance value is reduced, reducing the phenomenon of partial green picture in the liquid crystal display screen as a whole.
Abstract:
Provided are a shift register, a driving method thereof, and a gate driving circuit. The shift register includes an input sub-circuit, a first reset sub-circuit, an output sub-circuit, a pull-down sub-circuit, a pull-down control sub-circuit, and a second reset sub-circuit. The input sub-circuit provides a signal of the first voltage source to the pull-up node and the first node under the control of the signal input terminal; the first reset sub-circuit provides a signal of the second voltage source to the pull-up node and the first node under the control of the reset terminal; the output sub-circuit outputs the signal of the clock signal terminal to the signal output terminal according to the level of the pull-up node.
Abstract:
The present disclosure provides a shift register, a gate driving circuit and a display panel, and belongs to the field of display technology. The shift register of the present disclosure includes: an input circuit configured to precharge and reset a pull-up node; one pull-down control circuit being electrically connected to one pull-down circuit through a pull-down node; the pull-down control circuit being configured to control a potential at the pull-down node under a first power voltage; each pull-down circuit being configured to pull down the potential at the pull-down node in response to a potential at the pull-up node; an output circuit configured to output a clock signal through a signal output terminal in response to the potential at the pull-up node; one first noise reduction circuit connected to one pull-down node.
Abstract:
A display substrate, a display device and a test method of the display substrate are disclosed. The display substrate includes a display region and a peripheral region. The peripheral region includes: a first leading wire extending in a first direction and including a first end and a second end; a first test wire electrically connected with the first leading wire at a first position of the first test wire between the first end and the second end; the display region includes first signal wires of first group extending in a second direction, two first signal wires arranged outermost in the first direction among the first signal wires of first group are respectively connected with the first end and the second end, and remaining first signal wires among the first signal wires of first group are connected with the first leading wire between the first end and the second end.
Abstract:
Provided is a display panel. The display panel comprises an array substrate and a color filter substrate, wherein the color filter substrate comprises a second substrate and a black matrix pattern, wherein the black matrix pattern comprises a body, via hole shielding parts, and compensation shielding parts, the via hole shielding parts being disposed within first domains of part of plurality of sub-pixel regions, the compensation shielding parts being disposed within second domains that are adjacent in first direction to the first domains where the via hole shielding parts are disposed, and at most one of the via hole shielding part and the compensation shielding part being disposed in one sub-pixel region.
Abstract:
A selection circuit, a method for controlling the selection circuit, and a multiplexing circuit are provided. The selection circuit includes N control circuits and M booster circuits. Control terminals of M control circuits among the N control circuits are coupled to output terminals of the M booster circuits, respectively, and first input terminals of the M booster circuits are coupled to receive M control signals among N control signals, respectively. Second input terminals of the M booster circuits are coupled to receive M boost signals respectively, and each booster circuit is configured to provide the received control signal to an output terminal of the booster circuit and increase a potential at the output terminal of the booster circuit by using the received boost signal.
Abstract:
The present application discloses a shift-register circuit including a shift-register unit and a shutdown-discharge sub-circuit. The shift-register unit is coupled to a clock port, a first reference voltage port, a second reference voltage port, and an output port and configured to set a voltage level at a pull-up node to control a clock signal from the clock port being outputted to the output port to drive a display panel during a display period. The shutdown discharge sub-circuit is configured to at least simultaneously receive a shutdown signal at a first voltage level from a shutdown-discharge control port and a second signal at the first voltage level from the second reference voltage port to start a shutdown period to discharge at least one of the pull-up node and the output port. The shutdown signal has a signal length longer than a signal length of the second signal.
Abstract:
A shift register unit, a method of driving the same, a gate driving circuit and a display device are provided. The shift register unit includes a pull-up node control circuit, a first pull-down node control circuit, a second pull-down node control circuit, a pull-down node switching control circuit, and a gate driving output circuit. The pull-down node switching control circuit is configured to control the first control voltage signal to be written into the first pull-down node and control the second control voltage signal to be written into the second pull-down node under the control of a frame reset control signal. The gate driving output circuit is configured to control a gate driving signal outputted by a gate driving signal output terminal under the control of the voltage signal of the pull-up node, the voltage signal of the first pull-down node, and the voltage signal of the second pull-down node.
Abstract:
The present application discloses a display panel having a first display substrate and a second display substrate facing the first display substrate, the display panel includes a floating electrode layer including a plurality of floating electrodes on the first display substrate; the floating electrode layer being spaced apart from the second display substrate by a distance; a driving electrode layer including a plurality of driving electrodes on the second display substrate; and a sensor electrode layer including a plurality of sensor electrodes on the second display substrate; each of the plurality of floating electrodes corresponding to a pair of driving electrode and sensor electrode. The floating electrode layer, the driving electrode layer, and the sensor electrode layer are configured so that at least one of the plurality of floating electrodes is movable relative to at least one of a corresponding driving electrode and a corresponding sensor electrode in response to a pressure from a touch, resulting in a detectable capacitance change between the corresponding driving electrode and the corresponding sensor electrode.
Abstract:
The disclosure provides a gate driving circuit, an array substrate and a method for recovering the same. The gate driving circuit comprises: a plurality of cascaded shift registers; a recovering signal line and a first reference signal line, extending along an arrangement direction of the shift registers; and a plurality of recovering units, corresponding to the shift registers respectively. After determining a failed shift register in the gate driving circuit, the recovering unit replaces a signal outputted from the failed shift register with a first reference signal from the first reference signal line and loads the first reference signal to the corresponding gate line for recovering. Thus, compared with a structure of outputting the signal provided by the recovering signal line to the gate line, the gate driving circuit of the disclosure has a less significant attenuation on the signal outputted to the gate line.