Wideband receiver robust to radio frequency harmonics

    公开(公告)号:US09124335B1

    公开(公告)日:2015-09-01

    申请号:US14702609

    申请日:2015-05-01

    CPC classification number: H04B1/1081 H03D7/18 H04B1/10 H04B15/06

    Abstract: A radio frequency (RF) noise-cancelling receiver includes first transconductance cells configured to produce respective weighted current signals proportional to an input voltage signal. The RF receiver includes frequency conversion cells coupled to the first transconductance cells and configured to mix the weighted current signals with a plurality of non-overlapping local oscillator (LO) signals to produce downconverted current signals. The RF receiver includes transimpedance amplifiers coupled to the frequency conversion cells and configured to produce output voltage signals proportional to the downconverted current signals. The transimpedance amplifiers include second transconductance cells. Each of the first and second transconductance cells has an effective transconductance of a first magnitude for frequency components of the input voltage signal arising from a first harmonic and an effective transconductance of a second magnitude less than the first magnitude for frequency components of the input voltage signal arising from harmonics at integer multiples of the first harmonic.

    Baseband harmonic rejection circuit
    13.
    发明授权
    Baseband harmonic rejection circuit 有权
    基带谐波抑制电路

    公开(公告)号:US09037106B2

    公开(公告)日:2015-05-19

    申请号:US13734863

    申请日:2013-01-04

    Abstract: A circuit for baseband harmonic rejection includes multiple transconductance cells coupled to one another at outputs of the transconductance cells and configured to receive down-converted signals that vary from one another to produce a weighted current signal proportional to a voltage corresponding to a respective down-converted signal. The circuit also includes a feedback impedance coupled between an input of one of the transconductance cells and the outputs of the transconductance cells. Each of the transconductance cells has an effective transconductance of a first magnitude for frequency components of the down-converted signal arising from a first harmonic and an effective transconductance of a second magnitude less than the first magnitude for frequency components of the down-converted signal arising from harmonics at integer multiples of the first harmonic.

    Abstract translation: 用于基带谐波抑制的电路包括在跨导单元的输出处彼此耦合的多个跨导单元,并被配置为接收彼此变化的下变频信号,以产生与对应于相应的下变频的电压成比例的加权电流信号 信号。 电路还包括耦合在跨导单元之一的输入和跨导单元的输出之间的反馈阻抗。 每个跨导单元对于由第一谐波产生的下变频信号的频率分量和对于下变频信号的频率分量的小于第一幅度的第二幅度的有效跨导,具有第一幅度的有效跨导 从谐波在整数倍的一次谐波。

    Phase-noise reduction technique using frequency-to-current conversion with baseband integration
    14.
    发明授权
    Phase-noise reduction technique using frequency-to-current conversion with baseband integration 有权
    使用基带集成的频率到电流转换的相位降噪技术

    公开(公告)号:US08977222B2

    公开(公告)日:2015-03-10

    申请号:US13681316

    申请日:2012-11-19

    CPC classification number: H04B17/0055 H04B17/11 H04B17/345

    Abstract: A circuit for measurement of a phase noise of an oscillator may include the oscillator to generate a first signal having the same oscillation frequency as an instantaneous oscillation frequency of the oscillator. The circuit may include a first circuit that is configured to generate a second signal from the first signal. An instantaneous amplitude of the second signal may be related to the oscillation frequency of the first signal. A second circuit may be configured to integrate the second signal to generate a third signal. The third signal can be a measure of the phase noise of the oscillator. The third signal can be used to cancel some or all of the phase noise of the oscillator.

    Abstract translation: 用于测量振荡器的相位噪声的电路可以包括振荡器以产生具有与振荡器的瞬时振荡频率相同的振荡频率的第一信号。 电路可以包括被配置为从第一信号产生第二信号的第一电路。 第二信号的瞬时振幅可以与第一信号的振荡频率有关。 第二电路可以被配置为对第二信号进行积分以产生第三信号。 第三个信号可以是振荡器的相位噪声的量度。 第三个信号可用于消除振荡器的一些或全部相位噪声。

    USING DIRECT PHASE NOISE MEASUREMENT AND BLOCKER RECOVERY TO CANCEL RECIPROCAL MIXING NOISE
    15.
    发明申请
    USING DIRECT PHASE NOISE MEASUREMENT AND BLOCKER RECOVERY TO CANCEL RECIPROCAL MIXING NOISE 有权
    使用直接相位噪声测量和阻塞器恢复来取消混频混频噪声

    公开(公告)号:US20140141740A1

    公开(公告)日:2014-05-22

    申请号:US13681333

    申请日:2012-11-19

    CPC classification number: H04B1/1027

    Abstract: A method for reciprocal-mixing noise cancellation may include receiving a baseband signal down-converted to baseband using a local oscillator (LO). The baseband signal may comprise a wanted signal and a reciprocal mixing noise, which at least partially overlaps the wanted signal and is due to mixing of a blocker signal with a phase noise of the LO. Blocker recovery may be performed on the baseband signal and a blocker estimate signal may be generated from the baseband signal. The phase noise of the LO may be measured and used in generating a phase noise measurement signal. The blocker estimate signal and the phase noise measurement signal may be processed to generate a reconstructed noise signal that may comprise the overlapping reciprocal mixing noise. The reconstructed noise signal may be subtracted from the baseband signal to provide the wanted signal free from to the reciprocal mixing noise.

    Abstract translation: 用于相互混合噪声消除的方法可以包括使用本地振荡器(LO)接收被下变频到基带的基带信号。 基带信号可以包括有用信号和互易混合噪声,其与有用信号至少部分重叠,并且是由于阻塞信号与LO的相位噪声的混合引起的。 可以对基带信号执行阻塞恢复,并且可以从基带信号生成阻塞估计信号。 可以测量LO的相位噪声并用于产生相位噪声测量信号。 阻塞估计信号和相位噪声测量信号可被处理以产生重构的噪声信号,其可以包括重叠的互倒混合噪声。 可以从基带信号中减去重建的噪声信号,以提供不需要的混合噪声的有用信号。

    Generating high-frequency, non-overlapping clocks
    16.
    发明授权
    Generating high-frequency, non-overlapping clocks 有权
    生成高频,非重叠时钟

    公开(公告)号:US08618859B1

    公开(公告)日:2013-12-31

    申请号:US13666881

    申请日:2012-11-01

    CPC classification number: H03K5/15013

    Abstract: A method for generation of high frequency, non-overlapping clocks may include receiving input clock signals at a clock input node of a circuit. Multiple feedback signals may be received at a number of input feedback nodes of the circuit. At a startup node, a startup signal of the circuit may be received, and, in response to receiving the startup signal, an output clock may be generated at a predefined portion of at least one of the received input clock signals. A stable high frequency output clock may be generated at an output stage by utilizing the feedback signals received by the input feedback nodes.

    Abstract translation: 用于产生高频非重叠时钟的方法可以包括在电路的时钟输入节点处接收输入时钟信号。 可以在电路的多个输入反馈节点处接收多个反馈信号。 在启动节点处,可以接收电路的启动信号,并且响应于接收到启动信号,可以在所接收的输入时钟信号中的至少一个的预定义部分处生成输出时钟。 可以通过利用由输入反馈节点接收的反馈信号在输出级产生稳定的高频输出时钟。

    Method and system for low-noise, highly-linear receiver front-end
    17.
    发明授权
    Method and system for low-noise, highly-linear receiver front-end 有权
    低噪声,高线性接收机前端的方法和系统

    公开(公告)号:US09031529B2

    公开(公告)日:2015-05-12

    申请号:US13863057

    申请日:2013-04-15

    CPC classification number: H04B1/16 H04B1/30

    Abstract: Aspects of a method and system for a low-noise, highly-linear receiver front-end are provided. In this regard, a received signal may be processed via one or more transconductances, one or more transimpedance amplifiers (TIAs), and one or more mixers to generate a first baseband signal corresponding to a voltage at a node of the receiver, and a second baseband signal corresponding to a current at the node of the receiver. The first signal and the second signal may be processed to recover information from the received signal. The first signal may be generated via a first one or more signal paths of the receiver and the second signal may be generated via a second one or more signal paths of the receiver.

    Abstract translation: 提供了一种用于低噪声,高线性接收机前端的方法和系统。 在这方面,可以经由一个或多个跨导,一个或多个跨阻抗放大器(TIAs)和一个或多个混频器来处理接收的信号,以产生对应于接收机的节点处的电压的第一基带信号,以及第二 对应于接收机节点处的电流的基带信号。 可以处理第一信号和第二信号以从接收的信号中恢复信息。 可以经由接收机的第一个或多个信号路径生成第一信号,并且可以经由接收机的第二个一个或多个信号路径来生成第二信号。

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