Write driver with improved boosting circuit and interconnect impedance matching
    11.
    发明申请
    Write driver with improved boosting circuit and interconnect impedance matching 有权
    写驱动器具有改进的升压电路和互连阻抗匹配

    公开(公告)号:US20050237785A1

    公开(公告)日:2005-10-27

    申请号:US11105174

    申请日:2005-04-13

    CPC classification number: G11B5/02 G11B5/022 G11B2005/0018 H02M3/07

    Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a pair of current sources, such as MOS transistors, connected to the input node of a single capacitor. During the overshoot duration, the current sources selectively operate at saturation to generate a pulsed current with an amplitude of half the load current. The recharge of the capacitor is done with the load current.

    Abstract translation: 一个写入驱动器通过一个连接到写入头的头驱动写入电流。 写驱动器包括匹配输出电阻到互连的奇特特性阻抗的电路和升压电路。 连接在高电压基准或电源电压和低电压基准之间的升压电路,并且包括连接到单个电容器的输入节点的一对电流源,例如MOS晶体管。 在过冲持续时间期间,电流源选择性地工作在饱和状态以产生具有一半负载电流幅度的脉冲电流。 电容器的充电由负载电流完成。

    Electrostatic MEMS driver with on-chip capacitance measurement for autofocus applications
    12.
    发明授权
    Electrostatic MEMS driver with on-chip capacitance measurement for autofocus applications 有权
    用于自动对焦应用的具有片上电容测量的静电MEMS驱动器

    公开(公告)号:US08188755B2

    公开(公告)日:2012-05-29

    申请号:US12685992

    申请日:2010-01-12

    CPC classification number: G03B21/53 G01R27/2605 G02B7/08 G03B3/10 G03B13/34

    Abstract: A driver and capacitance measuring circuit includes a voltage source that selectively generates an output voltage at a first node during a driver mode to alter a capacitance of a device that is connected to the first node and that has a variable capacitance. A current source selectively provides one of a charging and discharging current at the first node during a measurement mode. A capacitance calculating circuit samples a voltage at the first node during the measurement node, determines a voltage change rate of the first node during the measurement mode and calculates the capacitance of the device based on the voltage change rate and a value of the one of the charging and discharging current.

    Abstract translation: 驱动器和电容测量电路包括电压源,其在驱动器模式期间选择性地在第一节点处产生输出电压,以改变连接到第一节点并具有可变电容的装置的电容。 在测量模式期间,电流源选择性地提供第一节点处的充电和放电电流之一。 电容计算电路在测量节点期间对第一节点处的电压进行采样,在测量模式期间确定第一节点的电压变化率,并基于电压变化率和电压变化率的一个值计算器件的电容 充放电电流。

    Circuit and method for writing to a memory disk with a boosted voltage
    13.
    发明授权
    Circuit and method for writing to a memory disk with a boosted voltage 有权
    用升压电压写入存储盘的电路和方法

    公开(公告)号:US06512645B1

    公开(公告)日:2003-01-28

    申请号:US09393231

    申请日:1999-09-09

    CPC classification number: G11B5/022 G11B5/012 G11B5/02 G11B5/09

    Abstract: A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device coupled to a terminal of the write head, a current sink circuit which is coupled to the write head terminal and a bootstrap circuit coupled to the current sink circuit. When reversing the direction of current flow through the write head so that current is drawn from the write head from the write head terminal, the bootstrap circuit and the current sink circuit are activated. When the current in the write head nears and/or slightly surpasses the desired destination current level, the bootstrap circuit is deactivated and the pull-up device is thereafter immediately activated for a predetermined period of time.

    Abstract translation: 公开了一种用于控制磁盘存储装置的写入头的方法和电路。 电路包括耦合到写头的端子的上拉装置,耦合到写入头端子的电流吸收电路和耦合到电流吸收电路的自举电路。 当逆向通过写入头的电流的方向使得电流从写入头从写入头抽出时,自举电路和电流吸收电路被激活。 当写头中的电流接近和/或稍微超过期望的目的地电流电平时,自举电路被去激活,然后上拉装置立即激活预定时间段。

    High-pass filter structure with programmable zeros
    14.
    发明授权
    High-pass filter structure with programmable zeros 失效
    具有可编程零点的高通滤波器结构

    公开(公告)号:US5644267A

    公开(公告)日:1997-07-01

    申请号:US455850

    申请日:1995-05-31

    CPC classification number: H03H11/0433

    Abstract: A high-pass filter in particular for high-frequency applications and of the type comprising at least one input terminal (IN) and at least one output terminal (OUT) between which is defined a transfer function (FdT) and is inserted a biquadratic cell (18) incorporating a series of transconductance stages (2, 3, 4, 5) comprises a generator circuit (29) of variable currents (i.sub.K1, i.sub.K2) connected between a pair of stages (2, 3) of the biquadratic cell (18) and a voltage reference (GND). Said generator allows introduction of programmable zeroes in the transfer function (FdT) of the filter (20).

    Abstract translation: 一种高通滤波器,特别适用于高频应用,并且包括至少一个输入端(IN)和至少一个输出端(OUT)的类型,其间被定义为传递函数(FdT),并被插入一个二次电池 包括一系列跨导级(2,3,4,5)的(18)包括连接在所述二次电池(18)的一对级(2,3)之间的可变电流(iK1,iK2)的发电机电路(29) )和电压基准(GND)。 所述发生器允许在滤波器(20)的传递函数(FdT)中引入可编程零点。

    Transconductor stage
    15.
    发明授权
    Transconductor stage 失效
    跨导级

    公开(公告)号:US5495201A

    公开(公告)日:1996-02-27

    申请号:US145989

    申请日:1993-10-29

    CPC classification number: H03F3/45071 H03F1/3211 H03H11/0422

    Abstract: A transconductor stage for high-frequency filters operated on a low voltage supply, being of a type which comprises an input circuit portion having signal inputs, further comprises a pair of interconnected differential cells (2,3) being associated each with a corresponding signal input. Each cell incorporates at least one pair of bipolar transistors (Q1,Q2;Q3,Q4) having at least one corresponding terminal thereof (e.g. the emitter terminal) connected in common.

    Abstract translation: 一种用于在低电压电源上工作的高频滤波器的跨导电压级,其包括具有信号输入的输入电路部分的类型,还包括一对互连的差分单元(2,3),其中每一个具有对应的信号输入 。 每个单元包含至少一对具有共同连接的至少一个对应端子(例如发射极端子)的双极晶体管(Q1,Q2; Q3,Q4)。

    Method and apparatus for generating piezoelectric transducer excitation waveforms using a boost converter
    16.
    发明授权
    Method and apparatus for generating piezoelectric transducer excitation waveforms using a boost converter 有权
    使用升压转换器产生压电换能器激励波形的方法和装置

    公开(公告)号:US08854319B1

    公开(公告)日:2014-10-07

    申请号:US12986905

    申请日:2011-01-07

    CPC classification number: H03K17/964 G06F3/016 G06F3/041 H02M3/33507

    Abstract: Transducers formed as part of a touchscreen system emulate the motion of a pushbutton or other mechanical elements. A touchscreen system positions a transducer adjacent to an icon displayed on the touchscreen surface. When a user touches the icon, the transducer senses the touch and is then deformed in a pattern that emulates a mechanical motion, giving the user the sensation of touching a mechanical button. An excitation signal applied to the transducer is compared to a target excitation signal that, when applied to the transducer, causes the transducer to emulate the desired motion. When any differences between the two signals are detected, the excitation signal is adjusted so that the motion is corrected. The target excitation signal, or time and voltage segments defining it, are stored in memory and retrieved for comparison. The excitation signal is also selected to reduce any acoustic artifacts that can cause the transducer to generate audible clicks.

    Abstract translation: 作为触摸屏系统的一部分形成的传感器模拟按钮或其他机械元件的运动。 触摸屏系统将传感器定位在触摸屏表面上显示的图标附近。 当用户触摸图标时,换能器感测触摸,然后以模拟机械运动的图案变形,给予用户触摸机械按钮的感觉。 将施加到换能器的激励信号与目标激励信号进行比较,当施加到换能器时,其使得换能器模拟期望的运动。 当检测到两个信号之间的任何差异时,调整激励信号以使运动被校正。 目标激励信号或定义它的时间和电压段被存储在存储器中并且被检索用于比较。 还选择激励信号以减少可能导致换能器产生可听见的咔嗒声的任何声学伪影。

    TRANSMIT/RECEIVE SYSTEMS FOR IMAGING DEVICES
    17.
    发明申请
    TRANSMIT/RECEIVE SYSTEMS FOR IMAGING DEVICES 有权
    用于成像装置的发送/接收系统

    公开(公告)号:US20120250462A1

    公开(公告)日:2012-10-04

    申请号:US13077252

    申请日:2011-03-31

    Abstract: A transceiver for an ultrasonic imaging device includes a transmit circuit and a receive circuit. The transmit circuit outputs test pulses to a probe including a transducer to generate an image of a test object. A composite signal including the test pulses and a reflected signal is output by the transducer. The receive circuit receives the composite signal including the test pulses and the reflected signal and includes a filter circuit. The filter circuit filters the test pulses from the composite signal and passes the reflected signal. An impedance of the filter circuit is equal to substantially zero when the reflected signal is within a predetermined frequency range.

    Abstract translation: 用于超声波成像装置的收发器包括发射电路和接收电路。 发射电路将测试脉冲输出到包括换能器的探针以产生测试对象的图像。 包括测试脉冲和反射信号的复合信号由换能器输出。 接收电路接收包括测试脉冲和反射信号的复合信号,并包括滤波电路。 滤波器电路从复合信号中滤出测试脉冲并传递反射信号。 当反射信号在预定频率范围内时,滤波电路的阻抗基本上等于零。

    Fast CMOS matched impedance DC write current driver for preamplifiers
    18.
    发明授权
    Fast CMOS matched impedance DC write current driver for preamplifiers 有权
    快速CMOS匹配阻抗直流写入电流驱动器用于前置放大器

    公开(公告)号:US07116539B2

    公开(公告)日:2006-10-03

    申请号:US10611043

    申请日:2003-07-01

    CPC classification number: H03K17/08142 G11B5/012 G11B2005/0013 H03K17/102

    Abstract: A driver circuit includes a CMOS stage and switch functionalities for performing certain tasks. One task is to selectively block exposure of the CMOS stage to reference voltage(s). Another task is to selectively protect the CMOS stage during transient operation. Yet another task is to block leakage current from flowing from the CMOS stage to ground.

    Abstract translation: 驱动器电路包括用于执行某些任务的CMOS级和开关功能。 一个任务是选择性地阻止CMOS级的参考电压的暴露。 另一个任务是在瞬态操作期间选择性地保护CMOS级。 另一个任务是阻止漏电流从CMOS级流到地。

    Write head driver circuit and method for writing to a memory disk
    19.
    发明授权
    Write head driver circuit and method for writing to a memory disk 有权
    写头驱动电路和写入存储盘的方法

    公开(公告)号:US06504666B1

    公开(公告)日:2003-01-07

    申请号:US09651561

    申请日:2000-08-30

    CPC classification number: G11B5/022 G11B5/012 G11B5/02 G11B5/09 G11B2005/0013

    Abstract: A method and circuit are disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device and a current sink circuits coupled to each terminal of the write head, for selectively sourcing current to and sinking current from the write head, respectively. A clamp device is coupled to each write head terminal to selectively clamp the write head terminals to steady state intermediate voltage levels. The circuit further includes a control circuit for individually activating the pull-up devices, the current sink circuits and the clamp devices. In particular, when reversing the direction of current flow through the write head from a first direction in which current is provided to the write head via the write head terminal to a second direction in which current is drawn from the write head from the write head terminal, the appropriate pull-up device is activated for a predetermined period of time. The clamp device coupled to the temporarily activated pull-up device is thereafter activated to clamp the corresponding write head terminals to the steady state intermediate voltage levels.

    Abstract translation: 公开了一种用于控制磁盘存储装置的写入头的方法和电路。 该电路包括耦合到写入头的每个端子的上拉装置和电流吸收电路,用于分别选择性地将电流从写入头提供到和吸收电流。 夹持装置耦合到每个写入头端子,以将写入端子选择性地钳位到稳定的中间电压电平。 电路还包括用于单独激活上拉装置,电流吸收电路和钳位装置的控制电路。 特别地,当将写入头的电流的方向从写入头的第一方向从写入头终端提供到写入头的第一方向反转到来自写入头的写入头的电流的第二方向 ,适当的上拉装置被激活一段预定的时间。 此后激活耦合到临时激活的上拉装置的钳位装置,以将相应的写头终端钳位到稳态中间电压电平。

    Circuit and method for writing to a memory disk
    20.
    发明授权
    Circuit and method for writing to a memory disk 有权
    用于写入存储盘的电路和方法

    公开(公告)号:US06252450B1

    公开(公告)日:2001-06-26

    申请号:US09393058

    申请日:1999-09-09

    CPC classification number: G11B5/022 G11B5/012 G11B5/02 G11B5/09

    Abstract: A method and circuit is disclosed for controlling the write head of a magnetic disk storage device. The circuit includes a pull-up device coupled to a terminal of the write head, for selectively providing a current to the write head through the terminal. The circuit further includes parallel-connected first and second current sink circuits, each of which is coupled to the write head terminal and selectively activated to draw current from the write head via the write head terminal. The circuit further includes a control circuit for individually activating the pull-up device and the first and second current sink circuits. In particular, when reversing the direction of current flow through the write head from a first direction in which current is provided to the write head via the write head terminal to a second direction in which current is drawn from the write head from the write head terminal, both the first and second current sink circuits are activated by the control circuit. When the current in the write head nears the desired destination current level, the second current sink circuit is deactivated and the pull-up device is thereafter immediately activated for a predetermined period of time. The pull-up device is deactivated as the current in the write head approaches a constant value. Due to the deactivation of the second current sink circuit and the temporary activation of the pull-up device, current overshoot and undershoot of the write head current is minimized.

    Abstract translation: 公开了一种用于控制磁盘存储装置的写入头的方法和电路。 电路包括耦合到写入头的终端的上拉装置,用于通过终端选择性地向写入头提供电流。 电路还包括并联的第一和第二电流吸收电路,每个电路都耦合到写入头终端,并被选择性地激活以经由写入头终端从写入头抽取电流。 电路还包括用于单独激活上拉装置和第一和第二电流吸收电路的控制电路。 特别地,当将写入头的电流的方向从写入头的第一方向从写入头终端提供到写入头的第一方向反转到来自写入头的写入头的电流的第二方向时 第一和第二电流吸收电路都由控制电路激活。 当写头中的电流接近期望的目的地电流电平时,第二电流吸收电路被去激活,然后上拉装置立即激活预定时间段。 随着写入头中的电流接近恒定值,上拉器件被禁用。 由于第二电流吸收电路的去激活和上拉装置的暂时激活,写头电流的电流过冲和下冲被最小化。

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