公开(公告)号：US20090230891A1

公开(公告)日：2009-09-17

申请号：US12056237

申请日：2008-03-26

申请人： Bin Zhao ,  Jack W. Cornish ,  Brian B. Horng ,  Victor K. Lee ,  Andrew M. Kameya

发明人： Bin Zhao ,  Jack W. Cornish ,  Brian B. Horng ,  Victor K. Lee ,  Andrew M. Kameya

IPC分类号： H05B37/02

CPC分类号： H05B33/0827 ,  H05B33/0815 ,  Y02B20/347

摘要： Power management in a light emitting diode (LED) system having a plurality of LED strings is disclosed. A voltage source provides an output voltage to drive the LED strings. An LED driver monitors the tail voltages of the active LED strings to identify the minimum, or lowest, tail voltage and adjusts the output voltage of the voltage source based on the lowest tail voltage. The LED driver can adjust the output voltage so as to maintain the lowest tail voltage at or near a predetermined threshold voltage so as to ensure that the output voltage is sufficient to properly drive each active LED string with a regulated current in view of pulse width modulation (PWM) performance requirements without excessive power consumption.

摘要翻译： 公开了具有多个LED串的发光二极管（LED）系统中的电源管理。 电压源提供输出电压来驱动LED串。 LED驱动器监视有源LED串的尾部电压，以识别最小或最低的尾部电压，并根据最低的尾部电压调节电压源的输出电压。 LED驱动器可以调节输出电压，以将最低的尾部电压保持在预定阈值电压处或接近预定阈值电压，以便确保输出电压足以根据脉宽调制来适当地驱动具有调节电流的每个有源LED串 （PWM）性能要求，而无需过多的功耗。

公开(公告)号：US20090230874A1

公开(公告)日：2009-09-17

申请号：US12363179

申请日：2009-01-30

申请人： Bin Zhao ,  Jack W. Cornish ,  Brian B. Horng ,  Victor K. Lee ,  Andrew M. Kameya

发明人： Bin Zhao ,  Jack W. Cornish ,  Brian B. Horng ,  Victor K. Lee ,  Andrew M. Kameya

IPC分类号： H05B37/02

CPC分类号： H05B33/0815 ,  H05B33/0827

摘要： Techniques for dynamic headroom control in a light emitting diode (LED) system are disclosed. An output voltage is provided to drive a plurality of LED strings. A feedback controller monitors the tail voltages of the LED strings to identify the minimum tail voltage and adjusts the output voltage based on the lowest tail voltage. The LED strings grouped into subsets and the feedback controller is segmented such that, for a certain duration, a minimum tail voltage is determined for each subset. The minimum tail voltages of the subsets are used to determine the overall minimum tail voltage of the plurality of LED strings for the certain duration so as to control the output voltage in the following duration. The segments of the feedback controller can be implemented in separate integrated circuit (IC) packages, thereby facilitating adaptation to different numbers of LED strings by integrating the corresponding number of IC packages.

摘要翻译： 公开了一种用于发光二极管（LED）系统中的动态裕量控制技术。 提供输出电压以驱动多个LED串。 反馈控制器监视LED串的尾部电压，以识别最小尾电压，并根据最低的尾部电压调节输出电压。 将LED串分组成子集，并且反馈控制器被分段，使得在一定持续时间内，为每个子集确定最小尾电压。 子集的最小尾电压用于在特定持续时间内确定多个LED串的总体最小尾电压，以便在随后的持续时间内控制输出电压。 反馈控制器的段可以在单独的集成电路（IC）封装中实现，从而通过集成相应数量的IC封装来促进适应不同数量的LED串。

公开(公告)号：US20120207205A1

公开(公告)日：2012-08-16

申请号：US13025201

申请日：2011-02-11

申请人： Bin Zhao ,  Jack W. Cornish ,  Andrew M. Kameya ,  Weizhuang W. Xin

发明人： Bin Zhao ,  Jack W. Cornish ,  Andrew M. Kameya ,  Weizhuang W. Xin

IPC分类号： H03K9/08

CPC分类号： H05B33/0827 ,  G09G3/3406 ,  G09G2320/064

摘要： First information is received at a first pulse width modulation (PWM) module responsive to a chip select signal being asserted at a chip select input of a communication bus of the first PWM module during a first time. The first information is latched at a control register of the first PWM module in response to a first logic transition of the chip select signal. A first PWM signal is provided at a first output of the first PWM module beginning a predetermined amount of time after the first logic transition of the chip select signal, the first PWM signal generated by the first PWM module based upon the first information.

摘要翻译： 响应于在第一时间期间在第一PWM模块的通信总线的芯片选择输入端被断言的芯片选择信号，第一脉冲宽度调制（PWM）模块接收第一信息。 响应于芯片选择信号的第一逻辑转换，第一信息被锁存在第一PWM模块的控制寄存器中。 第一PWM信号设置在第一PWM模块的第一输出处，在芯片选择信号的第一逻辑转换，基于第一信息由第一PWM模块产生的第一PWM信号之后开始预定的时间量。

公开(公告)号：US08599915B2

公开(公告)日：2013-12-03

申请号：US13025201

申请日：2011-02-11

申请人： Bin Zhao ,  Jack W. Cornish ,  Andrew M. Kameya ,  Weizhuang W. Xin

发明人： Bin Zhao ,  Jack W. Cornish ,  Andrew M. Kameya ,  Weizhuang W. Xin

IPC分类号： H03K7/08 ,  H03K9/08

CPC分类号： H05B33/0827 ,  G09G3/3406 ,  G09G2320/064

摘要： First information is received at a first pulse width modulation (PWM) module responsive to a chip select signal being asserted at a chip select input of a communication bus of the first PWM module during a first time. The first information is latched at a control register of the first PWM module in response to a first logic transition of the chip select signal. A first PWM signal is provided at a first output of the first PWM module beginning a predetermined amount of time after the first logic transition of the chip select signal, the first PWM signal generated by the first PWM module based upon the first information.

摘要翻译： 响应于在第一时间期间在第一PWM模块的通信总线的芯片选择输入端被断言的芯片选择信号，第一脉冲宽度调制（PWM）模块接收第一信息。 响应于芯片选择信号的第一逻辑转换，第一信息被锁存在第一PWM模块的控制寄存器中。 第一PWM信号设置在第一PWM模块的第一输出处，在芯片选择信号的第一逻辑转换，基于第一信息由第一PWM模块产生的第一PWM信号之后开始预定的时间量。

公开(公告)号：US08228098B2

公开(公告)日：2012-07-24

申请号：US12537443

申请日：2009-08-07

申请人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

发明人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

IPC分类号： H03B19/00 ,  H03K7/08

CPC分类号： H03K7/08

摘要： A pulse width modulation (PWM) frequency converter converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter samples the input PWM signal for a PWM cycle using a sampling clock. A filter module filters the resulting set of one or more PWM parameters to compensate for noise introduced by potential clock mismatch, clock jitter, ambient variations, and other non-deterministic issues, thereby generating filtered PWM parameters. The sampling employed by the filter module compares a difference between the one or more current PWM parameters and previous (or historical) PWM parameters from an earlier sampled PWM cycle to a predetermined change threshold in determining a filtered set of one or more PWM parameters. The filtered set of one or more PWM parameters then is used to generate one or more corresponding PWM cycles of the output signal.

摘要翻译： 脉冲宽度调制（PWM）频率转换器将输入PWM信号转换为具有不同频率的输出PWM信号，同时保持基本相等的占空比。 PWM变频器使用采样时钟对PWM周期的输入PWM信号进行采样。 滤波器模块对所产生的一个或多个PWM参数进行滤波，以补偿由潜在的时钟失配，时钟抖动，环境变化和其他非确定性问题引入的噪声，从而产生滤波后的PWM参数。 滤波器模块采用的采样将一个或多个当前PWM参数和先前（或历史）PWM参数之间的差异从较早采样的PWM周期与预定的变化阈值进行比较，以确定一个或多个PWM参数的滤波集合。 一个或多个PWM参数的经过滤波的组然后用于产生输出信号的一个或多个相应的PWM周期。

公开(公告)号：US20110032008A1

公开(公告)日：2011-02-10

申请号：US12537443

申请日：2009-08-07

申请人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

发明人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

IPC分类号： H03B19/00

CPC分类号： H03K7/08

摘要： A pulse width modulation (PWM) frequency converter converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter samples the input PWM signal for a PWM cycle using a sampling clock. A filter module filters the resulting set of one or more PWM parameters to compensate for noise introduced by potential clock mismatch, clock jitter, ambient variations, and other non-deterministic issues, thereby generating filtered PWM parameters. The sampling employed by the filter module compares a difference between the one or more current PWM parameters and previous (or historical) PWM parameters from an earlier sampled PWM cycle to a predetermined change threshold in determining a filtered set of one or more PWM parameters. The filtered set of one or more PWM parameters then is used to generate one or more corresponding PWM cycles of the output signal.

摘要翻译： 脉冲宽度调制（PWM）频率转换器将输入PWM信号转换为具有不同频率的输出PWM信号，同时保持基本相等的占空比。 PWM变频器使用采样时钟对PWM周期的输入PWM信号进行采样。 滤波器模块对所产生的一个或多个PWM参数进行滤波，以补偿由潜在的时钟失配，时钟抖动，环境变化和其他非确定性问题引入的噪声，从而产生滤波后的PWM参数。 滤波器模块采用的采样将一个或多个当前PWM参数和先前（或历史）PWM参数之间的差异从较早采样的PWM周期与预定的变化阈值进行比较，以确定一个或多个PWM参数的滤波集合。 一个或多个PWM参数的经过滤波的组然后用于产生输出信号的一个或多个相应的PWM周期。

公开(公告)号：US20100085295A1

公开(公告)日：2010-04-08

申请号：US12244796

申请日：2008-10-03

申请人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

发明人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

IPC分类号： G09G3/36

CPC分类号： G09G3/3406 ,  G09G2320/064

摘要： A PWM generation module generates a PWM data signal used to control a light emitting diode (LED) driver for one or more strings of LEDs of a display device. The PWM data signal is synchronized with the frame boundaries of the video content being displayed. The PWM generation module can configure the PWM data signal such that a new PWM cycle is initiated at the start of each successive frame, and further whereby those PWM cycles that would be prematurely terminated at frame boundaries are instead driven at a constant reference level until the frame boundary. With this configuration, a substantially linear average light intensity can be achieved across frames, thereby reducing or eliminating display distortion that is often present in other PWM cycle synchronization techniques. The PWM generation module can use a self-learning process to make adjustments to the expected number of completeable PWM cycles per frame in response to dynamic changes in the frame rate, PWM frequency, or other related display parameters.

摘要翻译： PWM生成模块生成用于控制显示装置的一个或多个LED串的发光二极管（LED）驱动器的PWM数据信号。 PWM数据信号与正在显示的视频内容的帧边界同步。 PWM生成模块可以配置PWM数据信号，使得在每个连续帧的开始处启动新的PWM周期，并且进一步地，将在帧边界处过早终止的那些PWM周期以恒定的参考电平驱动直到 帧边界。 利用这种配置，可以跨帧实现基本线性的平均光强度，从而减少或消除其他PWM周期同步技术中经常出现的显示失真。 PWM生成模块可以使用自学习过程来响应于帧速率，PWM频率或其他相关显示参数的动态变化来调整每帧的可完成PWM周期的预期数量。

公开(公告)号：US08373643B2

公开(公告)日：2013-02-12

申请号：US12244796

申请日：2008-10-03

申请人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

发明人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

IPC分类号： G09G3/36

CPC分类号： G09G3/3406 ,  G09G2320/064

摘要： A PWM generation module generates a PWM data signal used to control a light emitting diode (LED) driver for one or more strings of LEDs of a display device. The PWM data signal is synchronized with the frame boundaries of the video content being displayed. The PWM generation module can configure the PWM data signal such that a new PWM cycle is initiated at the start of each successive frame, and further whereby those PWM cycles that would be prematurely terminated at frame boundaries are instead driven at a constant reference level until the frame boundary. With this configuration, a substantially linear average light intensity can be achieved across frames, thereby reducing or eliminating display distortion that is often present in other PWM cycle synchronization techniques. The PWM generation module can use a self-learning process to make adjustments to the expected number of completeable PWM cycles per frame in response to dynamic changes in the frame rate, PWM frequency, or other related display parameters.

摘要翻译： PWM生成模块生成用于控制显示装置的一个或多个LED串的发光二极管（LED）驱动器的PWM数据信号。 PWM数据信号与正在显示的视频内容的帧边界同步。 PWM生成模块可以配置PWM数据信号，使得在每个连续帧的开始处启动新的PWM周期，并且进一步地，将在帧边界处过早终止的那些PWM周期以恒定的参考电平驱动直到 帧边界。 利用这种配置，可以跨帧实现基本线性的平均光强度，从而减少或消除其他PWM周期同步技术中经常出现的显示失真。 PWM生成模块可以使用自学习过程来响应于帧速率，PWM频率或其他相关显示参数的动态变化来调整每帧的可完成PWM周期的预期数量。

公开(公告)号：US08188771B2

公开(公告)日：2012-05-29

申请号：US12537443

申请日：2009-08-07

申请人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

发明人： Bin Zhao ,  Andrew M. Kameya ,  Victor K. Lee

IPC分类号： H03B19/00 ,  H03K7/08

摘要： A pulse width modulation (PWM) frequency converter converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter samples the input PWM signal for a PWM cycle using a sampling clock. A filter module filters the resulting set of one or more PWM parameters to compensate for noise introduced by potential clock mismatch, clock jitter, ambient variations, and other non-deterministic issues, thereby generating filtered PWM parameters. The sampling employed by the filter module compares a difference between the one or more current PWM parameters and previous (or historical) PWM parameters from an earlier sampled PWM cycle to a predetermined change threshold in determining a filtered set of one or more PWM parameters. The filtered set of one or more PWM parameters then is used to generate one or more corresponding PWM cycles of the output signal.

公开(公告)号：US10212958B2

公开(公告)日：2019-02-26

申请号：US14111679

申请日：2012-04-13

申请人： Bin Zhao ,  Ning Zhou ,  Timothy S. Hansen ,  Michael A. Duffin ,  Domenico R. Cassone ,  Diane L. Gannon ,  Lynn C. Haynes ,  James M. Manns ,  Jeanny E. Zimeri ,  Peter Worfolk ,  Anthony Pracek

发明人： Bin Zhao ,  Ning Zhou ,  Timothy S. Hansen ,  Michael A. Duffin ,  Domenico R. Cassone ,  Diane L. Gannon ,  Lynn C. Haynes ,  James M. Manns ,  Jeanny E. Zimeri ,  Peter Worfolk ,  Anthony Pracek

IPC分类号： A23L1/211 ,  A23L7/10 ,  A21D2/14 ,  A21D2/36 ,  A21D2/38 ,  A21D6/00 ,  A21D13/02 ,  B02B1/08

摘要： A stabilized flour, such as stabilized whole grain wheat flour, exhibiting unexpectedly superior extended shelf life and superior biscuit baking functionality, may be produced with or without heating to inhibit lipase by subjecting whole grains or a bran and germ fraction or component to treatment with a lipase inhibitor, such as an acid or green tea extract. Treatment with the lipase inhibitor may be performed during tempering of the whole grains or berries or during hydration of the bran and germ fraction or component.