公开(公告)号：US10262919B2

公开(公告)日：2019-04-16

申请号：US15421709

申请日：2017-02-01

Applicant: Cisco Technology, Inc.

Inventor： Phil Slight ,  Vic Chia

IPC: H05K7/20 ,  H01L23/40 ,  H05K1/02

Abstract: A circuit board includes a heatsink configured to be coupled to the circuit board via a first coupling mechanism, the first coupling mechanism providing an asymmetrical downward force for coupling the heatsink to the circuit board. The circuit board further includes a second coupling mechanism configured to provide a counter force to the asymmetrical downward force of the first coupling mechanism. The counter force can be configured on an overhang portion of the heatsink that does not cover a circuit on the circuit board.

公开(公告)号：US20190027422A1

公开(公告)日：2019-01-24

申请号：US16137650

申请日：2018-09-21

Applicant: Cisco Technology, Inc.

Inventor： Vic Chia ,  Hong Huynh ,  Steven A. Hanssen ,  Robert Gregory Twiss

IPC: H01L23/40 ,  F16B5/02

CPC classification number: H01L23/4006 ,  F16B5/0266 ,  H01L2023/4081 ,  H01L2023/4087

Abstract: A heat sink mounting configuration is provided that is configured to prevent the heat sink from damaging ball grid arrays (BGA) of an application specific integrated circuit (ASIC) mounted on a printed circuit board (PCB) when the line card is subjected to vibrations and shocks. The heat sink mounting configuration may include a set of screws configured to be at least partially disposed within the apertures of the heat sink to secure the heat sink to the PCB. The mounting configuration includes a resilient member and a spacer disposed around the screws proximate to the apertures. The resilient members are configured to bias the heat sink against the ASIC to maintain the heat sink in contact with the ASIC. The spacers are configured to prevent the heat sink from impacting the ASIC with forces large enough to damage the BGA when the line card is subjected to vibrations and shocks.

公开(公告)号：US09949408B2

公开(公告)日：2018-04-17

申请号：US15166551

申请日：2016-05-27

Applicant: Cisco Technology, Inc.

Inventor： Vic Chia ,  M. Baris Dogruoz

IPC: H05K7/20 ,  H05K9/00

CPC classification number: H05K7/20736 ,  H05K7/20727 ,  H05K9/002 ,  H05K9/0041

Abstract: In one embodiment, an electromagnetic interference (EMI) shielding faceplate is configured to mount to a line-card slot of a multi-line-card electronic enclosure having an airflow cooling system. A perforation pattern in the faceplate defines an array of perforations in the faceplate, while a flow control sheet affixed to the faceplate and covering an adjustable percentage of the array of perforations in the faceplate from 0-100%, where an amount of airflow impedance caused by the perforations for the airflow cooling system is based on the percentage of the array of perforations covered by the flow control sheet.

公开(公告)号：US20170347495A1

公开(公告)日：2017-11-30

申请号：US15166551

申请日：2016-05-27

Applicant: Cisco Technology, Inc.

Inventor： Vic Chia ,  M. Baris Dogruoz

IPC: H05K7/20 ,  H05K9/00

CPC classification number: H05K7/20736 ,  H05K7/20727 ,  H05K9/002 ,  H05K9/0041

Abstract: In one embodiment, an electromagnetic interference (EMI) shielding faceplate is configured to mount to a line-card slot of a multi-line-card electronic enclosure having an airflow cooling system. A perforation pattern in the faceplate defines an array of perforations in the faceplate, while a flow control sheet affixed to the faceplate and covering an adjustable percentage of the array of perforations in the faceplate from 0-100%, where an amount of airflow impedance caused by the perforations for the airflow cooling system is based on the percentage of the array of perforations covered by the flow control sheet.