公开(公告)号：US20140259392A1

公开(公告)日：2014-09-18

申请号：US14215470

申请日：2014-03-17

Applicant: Chih-Cheng Chen ,  Izuchukwu Samuel ILonze

Inventor： Chih-Cheng Chen ,  Izuchukwu Samuel ILonze

IPC: A61G7/10 ,  A61G7/00

CPC classification number: A61G7/1042 ,  A61G7/1015 ,  A61G7/1051 ,  A61G7/1055 ,  Y10T137/8376

Abstract: The application is directed to a system operationally configured to assist individuals with performing one or more activities including, but not necessarily limited to moving from one location to another, showering, using a mirror, using a sink, bathing, using a toilet, performing one or more leisure activities, and combinations thereof. In one aspect, the system may include an assembly and transport member connected thereto, the assembly including a bed and/or bath and/or toilet and/or personal item storage system and/or entertainment system integrated with one or both of smart and manual processes operationally configured to assist individuals with performing one or more activities.

Abstract translation: 该应用涉及一种可操作地配置为帮助个人执行一个或多个活动的系统，包括但不一定限于从一个位置移动到另一个位置，使用镜子，使用水槽，洗澡，使用厕所，执行一个 或更多的休闲活动，及其组合。 在一个方面，系统可以包括连接到其上的组装和运输构件，该组件包括床和/或浴和/或马桶和/或个人物品存储系统和/或娱乐系统，其与智能和手动中的一个或两者集成 操作上配置以帮助个人执行一个或多个活动的过程。

公开(公告)号：US07955089B2

公开(公告)日：2011-06-07

申请号：US12793359

申请日：2010-06-03

Applicant: Chih-Cheng Chen

Inventor： Chih-Cheng Chen

IPC: H01R12/00

CPC classification number: H01R12/62 ,  H01R12/58 ,  H01R12/65 ,  H05K1/118 ,  H05K3/0058 ,  H05K2201/0397 ,  H05K2201/048 ,  H05K2201/10303 ,  H05K2201/1059

Abstract: A three-dimensional connector, which is used by a coordinate input device of a touch pad has a flat conductor cable with an end being connected to the touch pad and another end having multiple conductive lines. Each of the conductive lines is attached with a vertical guiding conductor pin. The guide conductor pin has a head section to press-fit with the flat conductor cable, and extends through a support to transmit electronic signals in a direction perpendicular to said flat conductor cable.

Abstract translation: 由触摸板的坐标输入装置使用的三维连接器具有扁平导体电缆，其端部连接到触摸板，另一端具有多条导线。 每个导线与一个垂直的引导导体引脚相连。 引导导体销具有头部部分以与扁平导体电缆压配合，并且延伸穿过支撑件以沿垂直于所述扁平导体电缆的方向传输电子信号。

公开(公告)号：US07586822B2

公开(公告)日：2009-09-08

申请号：US10623264

申请日：2003-07-18

Applicant: Chia-Hua Chou ,  Chih-Cheng Chen

Inventor： Chia-Hua Chou ,  Chih-Cheng Chen

IPC: G11B7/00

CPC classification number: G11B7/1267

Abstract: An optical disk drive includes an optical disk drive controller that can test the write channels between the controller and the laser diode driver. Using the results of this testing, the optical disk drive controller adjusts the characteristics of the write channel signals provided to the laser diode driver to correct for one or more detected imperfections in the write channel signals. Both the optical disk drive controller and the laser diode driver have communications ports to facilitate communication. The optical disk drive controller programs the operating characteristics of the laser diode driver so that the laser diode driver can be optimized for the measured characteristics of the write channels.

Abstract translation: 光盘驱动器包括可以测试控制器和激光二极管驱动器之间的写入通道的光盘驱动器控制器。 使用该测试的结果，光盘驱动器控制器调整提供给激光二极管驱动器的写入通道信号的特性，以校正写入通道信号中的一个或多个检测到的缺陷。 光盘驱动器控制器和激光二极管驱动器都具有通信端口以便于通信。 光盘驱动器控制器编程激光二极管驱动器的工作特性，使激光二极管驱动器可以针对测量的写通道特性进行优化。

公开(公告)号：US20090046555A1

公开(公告)日：2009-02-19

申请号：US12257833

申请日：2008-10-24

Applicant: Tse-Hsiang HSU ,  Chih-Cheng Chen

Inventor： Tse-Hsiang HSU ,  Chih-Cheng Chen

IPC: G11B20/18

CPC classification number: G11B20/10212 ,  G11B7/00456 ,  G11B2020/1287 ,  G11B2020/1461

Abstract: An aligned write signal generator with alignment calibration utilizes an alignment unit to align a plurality of write signal. The aligned write signal generator includes a write signal generator for receiving an EFM signal and converting the EFM signal into a plurality of write signals according to a write strategy waveform generating rule, an alignment unit for receiving the plurality of write signals, aligning the write signals and outputting phase adjusted write signals, and a phase calibration unit for receiving the phase adjusted write signals, detecting phase error between the phase adjusted write signals, and outputting phase control signals. The alignment unit further receives the phase control signals to adjust the delay time of each write signal.

Abstract translation: 具有对准校准的对准的写入信号发生器利用对准单元对准多个写入信号。 对准的写信号发生器包括写信号发生器，用于接收EFM信号，并根据写策略波形产生规则将EFM信号转换为多个写信号;对准单元，用于接收多个写信号，对准写信号 并输出相位调整的写入信号，以及相位校准单元，用于接收相位调整的写入信号，检测相位调整的写入信号之间的相位误差，并输出相位控制信号。 对准单元还接收相位控制信号以调整每个写入信号的延迟时间。

公开(公告)号：US07457213B2

公开(公告)日：2008-11-25

申请号：US10868952

申请日：2004-06-17

Applicant: Tse-Hsiang Hsu ,  Chih-Cheng Chen

Inventor： Tse-Hsiang Hsu ,  Chih-Cheng Chen

IPC: G11B15/52

CPC classification number: G11B20/10212 ,  G11B7/00456 ,  G11B2020/1287 ,  G11B2020/1461

Abstract: An aligned write signal generator with alignment calibration utilizes an alignment unit to align a plurality of write signal. The aligned write signal generator includes a write signal generator for receiving an EFM signal and converting the EFM signal into a plurality of write signals according to a write strategy waveform generating rule, an alignment unit for receiving the plurality of write signals, aligning the write signals and outputting phase adjusted write signals, and a phase calibration unit for receiving the phase adjusted write signals, detecting phase error between the phase adjusted write signals, and outputting phase control signals. The alignment unit further receives the phase control signals to adjust the delay time of each write signal.

Abstract translation: 具有对准校准的对准的写入信号发生器利用对准单元对准多个写入信号。 对准的写信号发生器包括写信号发生器，用于接收EFM信号，并根据写策略波形产生规则将EFM信号转换为多个写信号;对准单元，用于接收多个写信号，对准写信号 并输出相位调整的写入信号，以及相位校准单元，用于接收相位调整的写入信号，检测相位调整的写入信号之间的相位误差，并输出相位控制信号。 对准单元还接收相位控制信号以调整每个写入信号的延迟时间。

公开(公告)号：US07333568B2

公开(公告)日：2008-02-19

申请号：US10708616

申请日：2004-03-15

Applicant: Chih-Cheng Chen ,  Shang-Ping Chen

Inventor： Chih-Cheng Chen ,  Shang-Ping Chen

IPC: H04L25/06 ,  H04L25/10

CPC classification number: H04L25/063

Abstract: A data slicer includes a comparator coupled with an input signal and a reference signal for generating a sliced signal, a waveform generator for generating a calibration signal, a pulse extension device coupled to the comparator and the waveform generator for modifying the duty cycle of the sliced signal or the calibration signal to output, a charge pump coupled between the pulse extension device and a first node for charging and discharging the first node according to the signal output from the pulse extension device, a determining circuit for adjusting the data slicer according to the level change at the first node, and a feedback device coupled between the first node and the comparator for generating the reference signal.

Abstract translation: 数据限幅器包括与输入信号和用于产生分片信号的参考信号耦合的比较器，用于产生校准信号的波形发生器，耦合到比较器的脉冲扩展装置和用于修改切片信号的占空比的波形发生器 信号或校准信号输出;电荷泵，其耦合在所述脉冲扩展装置和第一节点之间，用于根据从所述脉冲扩展装置输出的信号对所述第一节点进行充电和放电;确定电路，用于根据所述脉冲扩展装置调整所述数据限幅器 第一节点处的电平变化，以及耦合在第一节点和比较器之间用于产生参考信号的反馈装置。

公开(公告)号：US07126384B2

公开(公告)日：2006-10-24

申请号：US10737746

申请日：2003-12-18

Applicant: Tse-Hsiang Hsu ,  Yung-Yu Lin ,  Chih-Cheng Chen

Inventor： Tse-Hsiang Hsu ,  Yung-Yu Lin ,  Chih-Cheng Chen

IPC: H03K5/153

CPC classification number: G01R19/04

Abstract: A peak detection circuit with double peak detection stages includes an analog peak detector, an analog-to-digital converter (ADC), and a digital peak detector. The analog peak detector receives an analog input signal, detects a peak value of the analog input signal with a first period, and outputs an analog peak signal. The ADC receives the analog peak signal and converts it into a digital signal. The digital peak detector receives the digital signal, detects the peak value of the digital signal with a second period longer than the first period, and outputs a digital peak signal. Therefore, the analog peak signal will not decay seriously due to the leakage and the digital peak signal can hold the digital peak value for a long time.

Abstract translation: 具有双峰检测级的峰值检测电路包括模拟峰值检测器，模数转换器（ADC）和数字峰值检测器。 模拟峰值检测器接收模拟输入信号，以第一周期检测模拟输入信号的峰值，并输出模拟峰值信号。 ADC接收模拟峰值信号并将其转换为数字信号。 数字峰值检测器接收数字信号，以比第一周期长的第二周期检测数字信号的峰值，并输出数字峰值信号。 因此，模拟峰值信号由于泄漏而不会严重衰减，数字峰值信号可以长时间保持数字峰值。

公开(公告)号：US20050232102A1

公开(公告)日：2005-10-20

申请号：US11146034

申请日：2005-06-07

Applicant: Chia-Hua Chou ,  Chih-Cheng Chen

Inventor： Chia-Hua Chou ,  Chih-Cheng Chen

IPC: G11B7/125 ,  G11B7/00

CPC classification number: G11B7/1267

Abstract: The present invention with an optical disk drive controller and an optical pickup head connected together by a flexible cable is described. The device includes a delay adjusting module located within the first module for delaying a first signal by an amount specified by a calibration signal. The first module transmits the delayed first signal and a second signal through a first signal channel and a second signal channel, respectively, to the second module of the optical pickup head, a monitoring module located within the optical pickup head for receiving and reshaping the delayed first signal and the second signal so as to generate a monitor signal. A calibration signal-generating module is located within the optical disk drive controller for receiving the monitor signal so as to generate the calibration signal.

Abstract translation: 描述了通过柔性电缆连接在一起的光盘驱动器控制器和光学拾取头的本发明。 该装置包括位于第一模块内的延迟调整模块，用于将第一信号延迟由校准信号指定的量。 第一模块分别通过第一信号信道和第二信号信道将延迟的第一信号和第二信号发送到光学拾取头的第二模块，位于光学拾取头内的监测模块，用于接收和重新形成延迟的 第一信号和第二信号，以产生监视信号。 校准信号发生模块位于光盘驱动器控制器内，用于接收监视信号以产生校准信号。

公开(公告)号：US06897691B2

公开(公告)日：2005-05-24

申请号：US10437906

申请日：2003-05-15

Applicant: Chih-Cheng Chen ,  Tse-Hsiang Hsu

Inventor： Chih-Cheng Chen ,  Tse-Hsiang Hsu

IPC: H03L7/081 ,  H03L7/089 ,  H03L7/18 ,  H03L7/00

CPC classification number: H03L7/0891 ,  H03L7/081 ,  H03L7/18

Abstract: A phase locked loop (PLL) with low steady state phase errors utilizes a delay unit to delay an input signal or a reference clock so as to lower the steady state phase errors of the PLL. A calibration circuit is used to adjust the delay time of the delay unit and includes a signal generator for generating a simulation input signal and a simulation reference clock according to a phase locked clock; a delay unit for delaying the simulation reference clock and generating a delayed reference clock; a phase detector for detecting the phase error between the simulation input signal and the delayed reference clock and generating charge control signals; a charge pump and an integrator for generating an error voltage according to the charge control signals; a delay time control unit for adjusting the delay time of the delay unit according to the error voltage; and a voltage control oscillator for generating the oscillation clock according to a reference control voltage.

Abstract translation: 具有低稳态相位误差的锁相环（PLL）利用延迟单元来延迟输入信号或参考时钟，以降低PLL的稳态相位误差。 校准电路用于调整延迟单元的延迟时间，并包括用于根据锁相时钟产生模拟输入信号和模拟参考时钟的信号发生器; 延迟单元，用于延迟模拟参考时钟并产生延迟的参考时钟; 相位检测器，用于检测模拟输入信号和延迟的参考时钟之间的相位误差，并产生电荷控制信号; 电荷泵和用于根据充电控制信号产生误差电压的积分器; 延迟时间控制单元，用于根据误差电压调整延迟单元的延迟时间; 以及用于根据参考控制电压产生振荡时钟的电压控制振荡器。

公开(公告)号：US06850102B2

公开(公告)日：2005-02-01

申请号：US10253650

申请日：2002-09-25

Applicant: Tse-Hsiang Hsu ,  Chih-Cheng Chen

Inventor： Tse-Hsiang Hsu ,  Chih-Cheng Chen

IPC: H03L7/089 ,  H03L7/18 ,  H03L7/06

CPC classification number: H03L7/0895 ,  H03L7/18

Abstract: A signal calibration apparatus of a charge pump minimizes a current from the charge pump. The signal calibration apparatus includes a detecting circuit, a current adjusting circuit, and a calibrating circuit, wherein the detecting circuit is coupled to the charge pump for outputting a detecting signal according to the direction and magnitude of the current, the current adjusting circuit is coupled to the detecting circuit for outputting a calibrating signal according to the polarity and magnitude of the slew rate for the detection signal; and the calibrating circuit, which consists of a first calibration current source and a second calibration current source, is respectively coupled to the charge pump and the current adjusting circuit for adjusting the first current and the second current by outputting a first calibrating current and second calibrating current to the charge pump.

Abstract translation: 电荷泵的信号校准装置使来自电荷泵的电流最小化。 信号校准装置包括检测电路，电流调节电路和校准电路，其中检测电路耦合到电荷泵，用于根据电流的方向和幅度输出检测信号，电流调节电路耦合 检测电路，用于根据检测信号的转换速率的极性和大小输出校准信号; 并且由第一校准电流源和第二校准电流源组成的校准电路分别耦合到电荷泵和电流调节电路，用于通过输出第一校准电流和第二校准电流来调节第一电流和第二电流 电流到电荷泵。