Address handling
    11.
    发明授权
    Address handling 失效
    地址处理

    公开(公告)号:US08661162B2

    公开(公告)日:2014-02-25

    申请号:US11588903

    申请日:2006-10-26

    IPC分类号: G06F3/00

    CPC分类号: G06F12/06

    摘要: One exemplary method of assigning addresses in two or more address spaces with address fields of different lengths comprises defining address types, assigning a value to first bits at the high ends of the address fields to identify a first said address type, assigning second bits at the low ends of the address fields to identify addresses of the first said address type, and inserting different numbers of additional bits between the first bits and the second bits in the two or more address spaces.

    摘要翻译: 在具有不同长度的地址字段的两个或多个地址空间中分配地址的一种示例性方法包括定义地址类型,将值分配给地址字段的高端的第一位以识别第一所述地址类型,在第 地址字段的低端以标识第一所述地址类型的地址,以及在两个或多个地址空间中的第一位和第二位之间插入不同数量的附加位。

    Method and system for achieving varying manners of memory access
    12.
    发明授权
    Method and system for achieving varying manners of memory access 失效
    实现存储器访问方式不同的方法和系统

    公开(公告)号:US07904676B2

    公开(公告)日:2011-03-08

    申请号:US11741933

    申请日:2007-04-30

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0646

    摘要: A method and system for operating a computer system are disclosed. In at least some embodiments, the present invention relates to a method of operating a computer system that includes operating a first cell of the system in accordance with a first memory access configuration, and migrating a first attribute of a first core of the first cell to a second cell of the system. The method additionally includes configuring a portion of the first cell so that the first cell is capable of operating in accordance with a second memory access configuration, and migrating at least one of the first attribute and a second attribute from the second cell back to the first core of the first cell, whereby subsequently the first cell operates in the second mode of operation. In at least some embodiments, the first and second configurations are direct and agent access memory configurations, or vice-versa.

    摘要翻译: 公开了一种用于操作计算机系统的方法和系统。 在至少一些实施例中,本发明涉及一种操作计算机系统的方法,所述计算机系统包括根据第一存储器访问配置来操作所述系统的第一单元,以及将所述第一单元的第一核的第一属性迁移到 系统的第二个单元格。 该方法还包括配置第一小区的一部分,使得第一小区能够根据第二存储器访问配置进行操作,并且将第一属性和第二属性中的至少一个从第二小区迁移回第一个 核心,由此随后第一小区在第二操作模式下操作。 在至少一些实施例中,第一和第二配置是直接和代理访​​问存储器配置,反之亦然。

    System and method for dynamically moving checksums to different memory locations

    公开(公告)号:US07096389B2

    公开(公告)日:2006-08-22

    申请号:US10236504

    申请日:2002-09-06

    IPC分类号: G06F11/00

    CPC分类号: G06F11/1048

    摘要: A system for moving checksums within memory utilizes a plurality of memory systems and a system manager. A first memory system has a first memory location that is correlated with a checksum indicator. The checksum indicator identifies the memory system that is storing the checksum of the value presently stored at the first location. The system manager dynamically moves the checksum to a destination memory location and updates the checksum indicator such that the checksum indicator identifies the memory system of the destination memory location. While the checksum is being moved, checksum updates may occur to the memory location from which the checksum was moved. Thus, after moving the checksum, the system manager updates the checksum with the value stored at the location from which the checksum was moved. As a result, the checksum stored in the checksum destination location should be sufficiently updated to enable data recovery.

    System and method for dynamically moving checksums to different memory locations
    14.
    发明授权
    System and method for dynamically moving checksums to different memory locations 失效
    将校验和动态移动到不同存储位置的系统和方法

    公开(公告)号:US06490668B2

    公开(公告)日:2002-12-03

    申请号:US09738697

    申请日:2000-12-15

    IPC分类号: G06F1200

    CPC分类号: G06F11/1048

    摘要: A system for moving checksums within memory utilizes a plurality of memory systems and a system manager. A first memory system has a first memory location that is correlated with a checksum indicator. The checksum indicator identifies the memory system that is storing the checksum of the value presently stored at the first location. The system manager dynamically moves the checksum to a destination memory location and updates the checksum indicator such that the checksum indicator identifies the memory system of the destination memory location. While the checksum is being moved, checksum updates may occur to the memory location from which the checksum was moved. Thus, after moving the checksum, the system manager updates the checksum with the value stored at the location from which the checksum was moved. As a result, the checksum stored in the checksum destination location should be sufficiently updated to enable data recovery.

    摘要翻译: 用于在存储器内移动校验和的系统利用多个存储器系统和系统管理器。 第一存储器系统具有与校验和指示符相关联的第一存储器位置。 校验和指示符标识正在存储当前存储在第一位置的值的校验和的存储器系统。 系统管理员将校验和动态地移动到目的地存储器位置,并更新校验和指示符,使得校验和指示符识别目的地存储器位置的存储器系统。 当校验和被移动时,校验和被移动的内存位置可能会发生校验和更新。 因此,在移动校验和之后,系统管理员使用存储在校验和移动位置的值更新校验和。 结果,存储在校验和目标位置中的校验和应该被充分更新,以使数据恢复。

    PROTECTED PORTION OF PARTITION MEMORY FOR COMPUTER CODE

    公开(公告)号:US20090037668A1

    公开(公告)日:2009-02-05

    申请号:US11830909

    申请日:2007-07-31

    IPC分类号: G06F12/06 G06F12/14

    CPC分类号: G06F12/1441 G06F12/1491

    摘要: A system comprises a plurality of computing nodes and a plurality of separate memory devices. A separate memory device is associated with each computing node. The separate memory devices are configured as partition memory in which memory accesses are interleaved across multiple of such memory devices. A protected portion of the partition memory is reserved for use by complex management (CM) code that coordinates partitions implemented on the system. The protected portion of partition memory is restricted from access by operating systems running in the partitions.

    GLOBAL VIRTUAL ADDRESS SPACE ACROSS OPERATING SYSTEM DOMAINS

    公开(公告)号:US20230393970A1

    公开(公告)日:2023-12-07

    申请号:US17900400

    申请日:2022-08-31

    IPC分类号: G06F12/02 G06F12/1027

    摘要: Disclosed in some examples, are methods, systems, devices, and machine-readable mediums which solve the above problems using a global shared region of memory that combines memory segments from multiple CXL devices. Each memory segment is a same size and naturally aligned in its own physical address space. The global shared region is contiguous and naturally aligned in the virtual address space. By organizing this global shared region in this manner, a series of three tables may be used to quickly translate a virtual address in the global shared region to a physical address. This prevents TLB thrashing and improves performance of the computing system.

    PROTECTED PORTION OF PARTITION MEMORY FOR COMPUTER CODE
    17.
    发明申请
    PROTECTED PORTION OF PARTITION MEMORY FOR COMPUTER CODE 审中-公开
    计算机代码分区记忆保护部分

    公开(公告)号:US20090037678A1

    公开(公告)日:2009-02-05

    申请号:US11868772

    申请日:2007-10-08

    IPC分类号: G06F12/00

    摘要: A system comprises a plurality of computing nodes and a plurality of separate memory devices. A separate memory device is associated with each computing node. The separate memory devices are configured as partition memory in which memory accesses are interleaved across multiple of such memory devices. A protected portion of the partition memory is reserved for use by complex management (CM) code that coordinates partitions implemented on the system. The protected portion of partition memory is restricted from access by operating systems running in the partitions.

    摘要翻译: 系统包括多个计算节点和多个单独的存储器件。 单独的存储器设备与每个计算节点相关联。 分离的存储器件被配置为分区存储器,其中存储器访问跨多个这样的存储器件交错。 分区存储器的受保护部分保留用于协调在系统上实现的分区的复杂管理(CM)代码。 分区存储器的受保护部分受到在分区中运行的操作系统的访问的限制。

    Method and System for Achieving Varying Manners of Memory Access
    18.
    发明申请
    Method and System for Achieving Varying Manners of Memory Access 失效
    实现内存访问不同方式的方法和系统

    公开(公告)号:US20080270713A1

    公开(公告)日:2008-10-30

    申请号:US11741933

    申请日:2007-04-30

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0646

    摘要: A method and system for operating a computer system are disclosed. In at least some embodiments, the present invention relates to a method of operating a computer system that includes operating a first cell of the system in accordance with a first memory access configuration, and migrating a first attribute of a first core of the first cell to a second cell of the system. The method additionally includes configuring a portion of the first cell so that the first cell is capable of operating in accordance with a second memory access configuration, and migrating at least one of the first attribute and a second attribute from the second cell back to the first core of the first cell, whereby subsequently the first cell operates in the second mode of operation. In at least some embodiments, the first and second configurations are direct and agent access memory configurations, or vice-versa.

    摘要翻译: 公开了一种用于操作计算机系统的方法和系统。 在至少一些实施例中,本发明涉及一种操作计算机系统的方法,所述计算机系统包括根据第一存储器访问配置来操作所述系统的第一单元,以及将所述第一单元的第一核的第一属性迁移到 系统的第二个单元格。 该方法还包括配置第一小区的一部分,使得第一小区能够根据第二存储器访问配置进行操作,并且将第一属性和第二属性中的至少一个从第二小区迁移回第一个 核心,由此随后第一小区在第二操作模式下操作。 在至少一些实施例中,第一和第二配置是直接和代理访​​问存储器配置,反之亦然。

    System and method for performing backward error recovery in a computer
    19.
    发明授权
    System and method for performing backward error recovery in a computer 有权
    在计算机中执行向后错误恢复的系统和方法

    公开(公告)号:US06948112B2

    公开(公告)日:2005-09-20

    申请号:US09853955

    申请日:2001-05-10

    CPC分类号: G06F11/1469

    摘要: A system for performing data error recovery includes a memory unit and a memory controller. The memory unit includes a plurality of memory locations, and the memory controller maintains a checksum in one of the memory locations. At various times, the memory controller receives requests to update the checksum with data values identified by the requests. In response, the memory controller combines the checksum with these data values and stores the foregoing data values into memory. In one embodiment, the memory controller stores the foregoing data values into a plurality of stacks based on which protection domains are associated with the data values. In response to a detection of a data error, the memory controller retrieves a plurality of the stored data values and recovers a previous state of a particular memory location by combining each of the retrieved data values to the checksum.

    摘要翻译: 用于执行数据错误恢复的系统包括存储器单元和存储器控制器。 存储器单元包括多个存储器位置,并且存储器控制器在其中一个存储器位置中保持校验和。 在不同时间,存储器控制器接收用请求标识的数据值更新校验和的请求。 作为响应,存储器控制器将校验和与这些数据值组合,并将前述数据值存储到存储器中。 在一个实施例中,存储器控制器基于哪些保护域与数据值相关联将前述数据值存储到多个堆栈中。 响应于数据错误的检测,存储器控制器检索多个存储的数据值,并通过将检索到的每个数据值与校验和组合来恢复特定存储器位置的先​​前状态。

    System and method for mapping bus addresses to memory locations utilizing access keys and checksums
    20.
    发明授权
    System and method for mapping bus addresses to memory locations utilizing access keys and checksums 失效
    使用访问键和校验和将总线地址映射到存储单元的系统和方法

    公开(公告)号:US06807602B1

    公开(公告)日:2004-10-19

    申请号:US09699877

    申请日:2000-10-30

    IPC分类号: G06F1200

    CPC分类号: G06F12/0607

    摘要: A data storage system utilizes a plurality of memory systems, at least one processor, and a mapping system. Each of the memory systems has memory and a memory controller for storing and retrieving data. The processor transmits requests for writing data values. These requests include bus addresses. The mapping system maps the bus addresses into memory addresses. The mapping system maps consecutive bus addresses such that the memory addresses mapped from the consecutive bus addresses are interleaved across a plurality of the memory systems. In response to the foregoing requests from the processor, the mapping system identifies checksum system identifiers that identify locations where checksum values to be updated based on the aforementioned data values are stored. The checksum system identifiers preferably identify each of the plurality of mapping systems so that the checksum identifiers and, therefore, the checksum updates that occur based on these checksum system identifiers are interleaved across these memory systems.

    摘要翻译: 数据存储系统利用多个存储器系统,至少一个处理器和映射系统。 每个存储器系统具有存储器和用于存储和检索数据的存储器控​​制器。 处理器发送写入数据值的请求。 这些请求包括总线地址。 映射系统将总线地址映射到存储器地址。 映射系统映射连续的总线地址,使得从连续总线地址映射的存储器地址在多个存储器系统之间交错。 响应于来自处理器的上述请求,映射系统识别校验和系统标识符,该校验和系统标识符基于上述数据值被存储来标识要更新的校验和值的位置。 校验和系统标识符优选地识别多个映射系统中的每一个,使得校验和标识符以及因此基于这些校验和系统标识符发生的校验和更新在这些存储器系统之间交错。