公开(公告)号：US07084688B2

公开(公告)日：2006-08-01

申请号：US10929630

申请日：2004-08-30

Applicant: David McClure

Inventor： David McClure

IPC: G06F1/04

CPC classification number: G06F1/10

Abstract: The invention provides a clock delay arrangement accounting for the worst-case delay situation of data signals, which is independent of the layout and technology. It comprises a main clock line; two dummy clock lines, each arranged parallel to the main clock line, and the main clock line disposed between the two dummy clock lines; and a clock source coupled to the main clock line and the two dummy clock lines, adapted to drive said dummy clock lines in phase opposition with respect to the main clock line.

公开(公告)号：US20050134229A1

公开(公告)日：2005-06-23

申请号：US10890964

申请日：2004-07-14

Applicant: David McClure ,  William Bishop

Inventor： David McClure ,  William Bishop

IPC: H02J7/00

CPC classification number: H02J7/0031

Abstract: A battery protection structure is described. The structure provides battery overcharging protection while allowing for minimal battery voltage drop during normal battery operation. One resistance element sets voltage drop during normal operation, and the sum of two resistance elements sets the maximum battery charging current which will be allowed. The structure provides protection against single component failures.

Abstract translation: 描述了电池保护结构。 该结构提供电池过充保护，同时允许在正常电池操作期间最小的电池电压降。 一个电阻元件在正常工作期间设定电压降，两个电阻元件之和设定允许的最大电池充电电流。 该结构提供了防止单组件故障的保护。

公开(公告)号：US20050088222A1

公开(公告)日：2005-04-28

申请号：US10695293

申请日：2003-10-27

Applicant: David McClure

Inventor： David McClure

IPC: G05F1/10 ,  G05F3/24

CPC classification number: G05F3/247

Abstract: A voltage regulator having a plurality of current sources and adapted to make available current to a circuit, such as a memory device. One or more of the plurality of current sources is selectively enabled/disabled to provide either of two non-zero, distinct current levels to the circuit depending on a logic value of the chip enable signal. The chip enable signal is input to the circuit to enable/disable the circuit to perform various operations.

Abstract translation: 一种电压调节器，具有多个电流源并且适于向电路（例如存储器件）提供可用电流。 多个电流源中的一个或多个被选择性地使能/禁止，以根据芯片使能信号的逻辑值向电路提供两个非零的不同电流电平。 芯片使能信号被输入到电路以使能/禁止电路执行各种操作。

公开(公告)号：US07830124B2

公开(公告)日：2010-11-09

申请号：US11743795

申请日：2007-05-03

Applicant: David McClure

Inventor： David McClure

IPC: H02J7/00

CPC classification number: H02J7/0031

Abstract: A battery monitor circuit. The circuit includes a control module, a resistive load having a resistive value between a first and a second terminals and a part of that resistive value between the first and an intermediate terminals, a switch configured to couple the full load between circuit input and a common potential in response a pulse signal, a first comparator having inputs separately coupled to a voltage reference and the intermediate terminal, a second comparator having inputs separately coupled to the voltage reference and an input potential, a latch, a detection module having input coupled to second comparator output, and an alarm module. The latch is configured to latch a value at output of first comparator to another input of the detection module in response to the pulse signal; if input potential is less than a preselected magnitude, detection module output is configured to activate the alarm module.

Abstract translation: 电池监控电路。 所述电路包括控制模块，在第一和第二端子之间具有电阻值的电阻负载和在第一和中间端子之间的电阻值的一部分的电阻负载，被配置为将电路输入和公共端之间的满载耦合的开关 响应于脉冲信号的电位，具有分别耦合到电压基准和中间端子的输入的第一比较器，具有分别耦合到电压基准和输入电位的输入的第二比较器，锁存器，具有耦合到第二 比较器输出和报警模块。 锁存器被配置为响应于脉冲信号将第一比较器的输出处的值锁存到检测模块的另一个输入端; 如果输入电位小于预选值，则检测模块输出被配置为激活报警模块。

公开(公告)号：US07825704B2

公开(公告)日：2010-11-02

申请号：US11733081

申请日：2007-04-09

Applicant: David McClure

Inventor： David McClure

IPC: H03M1/78

CPC classification number: H03K17/22

Abstract: A threshold personalization circuit for a reset or supervisor chip includes personalization fuses, which shift a resistor divider to provide a variety of selectable voltage thresholds. The personalization fuses may provide hundreds of millivolts of adjustment. The threshold personalization circuit further includes trim fuses to fine tune the threshold to within a few millivolts of the target threshold voltage. The threshold personalization circuit includes a test mode to cycle through to a particular personalization trim, such that at prelaser testing the personalized value is found (the fuse blow for personalization is emulated) and then the trim fuse amount can be based on the actual final personalized voltage. This results in very accurate threshold voltages for all personalized values.

Abstract translation: 用于复位或管理芯片的阈值个性化电路包括个性化熔丝，其移动电阻分压器以提供各种可选择的电压阈值。 个性化保险丝可能提供数百​​毫伏的调整。 阈值个性化电路还包括修整保险丝以将阈值微调到目标阈值电压的几毫伏之内。 阈值个性化电路包括循环到特定个性化修整的测试模式，使得在预激光测试处找到个性化值（模拟个人化的保险丝熔断），然后修整熔丝量可以基于实际的最终个性化 电压。 这导致所有个性化值的非常精确的阈值电压。

公开(公告)号：US20070115122A1

公开(公告)日：2007-05-24

申请号：US11473451

申请日：2006-06-23

Applicant: David McClure ,  Sooping Saw ,  Robert Wadsworth

Inventor： David McClure ,  Sooping Saw ,  Robert Wadsworth

IPC: G08B13/14 ,  G08B21/00 ,  G05B19/00

CPC classification number: G11C16/20 ,  G11C16/22 ,  G11C17/16

Abstract: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal. A second circuit selectively couples the tamper alarm signal to the alarm output pad and test mode output pad depending on whether the integrated circuit is in a test mode. More specifically, the second circuit operates to drive the alarm output pad with the tamper alarm signal when the integrated circuit is not in test mode and drive the test mode output pad with the tamper alarm signal when the integrated circuit is in test mode (with the alarm output pad driven to a known state).

Abstract translation: 集成电路包括输出焊盘，报警输出焊盘和测试模式输出焊盘。 第一个多位寄存器是可编程的，用于存储可编程数据，例如识别已经制造了集成电路的客户的数据。 可编程第二个多位寄存器来存储客户指定的阈值数据。 第一电路将第一和第二多位寄存器选择性地耦合到输出焊盘。 第一电路可操作地响应于集成电路被放置在测试模式中，以执行存储在第一多位寄存器中的客户识别数据或存储在第二多位寄存器中的客户指定的阈值数据的并行 - 串行转换， 位寄存器，并通过输出板驱动转换后的数据输出。 集成电路还包括可响应于客户指定的阈值数据操作的篡改检测电路，以产生篡改报警信号。 第二电路根据集成电路是否处于测试模式，选择性地将篡改报警信号耦合到报警输出焊盘和测试模式输出焊盘。 更具体地，当集成电路不处于测试模式时，第二电路用于驱动具有篡改报警信号的报警输出板，并且当集成电路处于测试模式时驱动具有篡改报警信号的测试模式输出板 报警输出板驱动到已知状态）。

公开(公告)号：US20050152177A1

公开(公告)日：2005-07-14

申请号：US10783935

申请日：2004-02-20

Applicant: David McClure

Inventor： David McClure

IPC: G11C11/00 ,  G11C11/412

CPC classification number: G11C11/412 ,  G11C7/24

Abstract: A number of implementations are presented for destroying the data stored in a volatile memory cell.

Abstract translation: 呈现了用于破坏存储在易失性存储器单元中的数据的多个实现。

公开(公告)号：US20050134356A1

公开(公告)日：2005-06-23

申请号：US11012533

申请日：2004-12-15

Applicant: David McClure

Inventor： David McClure

IPC: H03K3/356 ,  H03K17/693 ,  H03L5/00

CPC classification number: H03K3/356113 ,  H03K17/693

Abstract: A voltage translating control structure for switching logic is described. A battery drain problem is corrected by this structure. The voltage translating feature allows reliable switching between power supply and battery even if the power supply voltage has significantly decreased. Operation is adaptable to include all DC power systems. Logic circuitry that also allows voltage translation is presented.

Abstract translation: 描述了用于开关逻辑的电压转换控制结构。 通过这种结构来纠正电池排出问题。 电压转换功能允许电源和电池之间的可靠切换，即使电源电压显着降低。 操作适应于包括所有直流电源系统。 还提供了允许电压转换的逻辑电路。

公开(公告)号：US06903584B2

公开(公告)日：2005-06-07

申请号：US10094165

申请日：2002-03-08

Applicant: Rong Yin ,  Tom Youssef ,  David McClure

Inventor： Rong Yin ,  Tom Youssef ,  David McClure

IPC: H01H9/16 ,  H03L7/06 ,  H02B1/24

CPC classification number: H01H9/167 ,  H03K17/18 ,  Y10T307/74 ,  Y10T307/766

Abstract: A circuit and method are disclosed for detecting activation of a switch, such as a mechanical switch. The circuit may include a first circuit for temporarily driving the second terminal of the switch to a second logic level. A second circuit, coupled to the switch, senses a voltage level of the second terminal of the switch and generates an output signal representative of the voltage sensed. A sequential logic circuit is responsive to the output signal of the second circuit so as to maintain a logic value representative of the switch having been closed.

Abstract translation: 公开了用于检测诸如机械开关的开关的激活的电路和方法。 电路可以包括用于将开关的第二端子临时驱动到第二逻辑电平的第一电路。 耦合到开关的第二电路感测开关的第二端子的电压电平，并产生表示所感测的电压的输出信号。 顺序逻辑电路响应于第二电路的输出信号，以便保持表示开关已经闭合的逻辑值。

公开(公告)号：US20070236262A1

公开(公告)日：2007-10-11

申请号：US11733072

申请日：2007-04-09

Applicant: David McClure

Inventor： David McClure

IPC: H03B1/00

CPC classification number: H03K19/0013

Abstract: An output driver for an integrated circuit that asserts at very low power supply voltages includes a first input voltage node, a first power supply voltage node, an output voltage node, a first internal circuit node, a first resistive element coupled between the first power supply voltage node and the first internal node, a first transistor having a gate coupled to first input voltage node, a drain coupled to the first power supply voltage node, and a source coupled to ground, a second transistor having a gate coupled to the first internal circuit node, a drain coupled to the output voltage node, and a source coupled to ground, and a third transistor having a gate coupled to the first internal circuit node, a drain coupled to the output voltage node, and a source coupled to ground, wherein the first and second transistors have a first Vt threshold voltage, and the third transistor has a second Vt threshold voltage lower than the first threshold voltage. Two or more such circuits driver circuits can be used in conjunction to monitor two or more power supply voltages.

Abstract translation: 用于在非常低的电源电压下断言的集成电路的输出驱动器包括第一输入电压节点，第一电源电压节点，输出电压节点，第一内部电路节点，耦合在第一电源 电压节点和第一内部节点，具有耦合到第一输入电压节点的栅极的第一晶体管，耦合到第一电源电压节点的漏极和耦合到地的源极，第二晶体管，具有耦合到第一内部节点的栅极 电路节点，耦合到输出电压节点的漏极和耦合到地的源，以及具有耦合到第一内部电路节点的栅极的第三晶体管，耦合到输出电压节点的漏极和耦合到地的源极， 其中所述第一和第二晶体管具有第一Vt阈值电压，并且所述第三晶体管具有低于所述第一阈值电压的第二Vt阈值电压。 两个或更多个这样的电路可以结合使用驱动电路来监视两个或多个电源电压。