公开(公告)号：US07353011B2

公开(公告)日：2008-04-01

申请号：US11180267

申请日：2005-07-13

Applicant: David R. Welland ,  Caiyi Wang

Inventor： David R. Welland ,  Caiyi Wang

IPC: H04B7/00 ,  H04B1/06

CPC classification number: H03L7/193 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18 ,  H03L7/199 ,  H03L7/23 ,  H03L2207/06

Abstract: A method and apparatus for synthesizing high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock. Second, the phase differences between the plurality of phase shifted signals and a divided version of a reference clock may be detected and then converted to the analog control signals.

Abstract translation: 用于合成诸如无线通信信号的高频信号的方法和装置包括具有可变电容电压控制振荡器（VCO）的锁相环（PLL）频率合成器，其具有连续变量的离散可变电容 电容。 离散可变电容可以提供可变电容的粗调谐调整，以补偿电容器和电感器公差，并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整，以将输出频率聚焦以精确地匹配期望的频率输出。 在微调调整期间，PLL可以由多个模拟控制信号控制。 可以通过首先从VCO输出时钟的分割版本产生多个相移信号来导出模拟控制信号。 第二，可以检测多个相移信号和参考时钟的分割版本之间的相位差，然后转换成模拟控制信号。

公开(公告)号：US07292091B1

公开(公告)日：2007-11-06

申请号：US11170380

申请日：2005-06-29

Applicant: David R. Welland ,  Donald A. Kerth ,  Caiyi Wang

Inventor： David R. Welland ,  Donald A. Kerth ,  Caiyi Wang

IPC: H03K5/00

CPC classification number: H05K9/00 ,  H03L7/18 ,  H05K1/0216 ,  H05K3/10 ,  Y10T29/49124

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

公开(公告)号：US06311050B1

公开(公告)日：2001-10-30

申请号：US09087174

申请日：1998-05-29

Applicant: David R. Welland ,  Caiyi Wang ,  Donald A. Kerth

Inventor： David R. Welland ,  Caiyi Wang ,  Donald A. Kerth

IPC: H04Q720

CPC classification number: H03L7/10 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/199 ,  H03L7/23

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. The invention disclosed avoids the need for a traditional varactor implementation in the VCO, for a traditional large capacitor component in the loop filter, and for component trimming during processing and thereby provides a high-frequency frequency synthesizer that may be fully integrated on a single chip except for an external inductor.

Abstract translation: 公开了一种用于合成高频信号的方法和装置，其克服了与现有实施相关的集成问题，同时满足苛刻的相位噪声和其他杂质要求。 在一个实施例中，公开了具有可变电容的压控振荡器（VCO）的锁相环（PLL）频率合成器，该可变电容包括连续可变电容的离散可变电容。 离散可变电容可以提供可变电容的粗调谐调节，并且连续可变电容可以提供可变电容的精细调谐。 所公开的发明避免了在VCO中对传统的变容二极管实现的需要，对于环路滤波器中的传统大电容器组件以及在处理期间的组件调整，从而提供可以完全集成在单个芯片上的高频频率合成器 外部电感除外。

公开(公告)号：US6150891A

公开(公告)日：2000-11-21

申请号：US87488

申请日：1998-05-29

Applicant: David R. Welland ,  Caiyi Wang

Inventor： David R. Welland ,  Caiyi Wang

IPC: H03D7/16 ,  H03L7/087 ,  H03L7/099 ,  H03L7/187 ,  H03L7/199 ,  H03L7/23 ,  H04B1/26 ,  H04B1/30 ,  H03B5/08 ,  H03L7/06 ,  H03L7/091 ,  H03L7/16

CPC classification number: H03L7/099 ,  H03D7/163 ,  H03L7/087 ,  H03L7/187 ,  H03L7/199 ,  H03L7/23 ,  H04B1/26 ,  H03J2200/10 ,  H04B1/30

Abstract: The synthesis of high-frequency signals, such as wireless communication signals, includes a phase-locked loop (PLL) frequency synthesizer with a variable capacitance voltage controlled oscillator (VCO) that has a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance to compensate for capacitor and inductor tolerances and to adjust the output frequency to be near the desired frequency output. The continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance to focus the output frequency to match precisely the desired frequency output. During fine tuning adjustment, the PLL may be controlled by a plurality of analog control signals. The analog control signals may be derived by first generating a plurality of phase shifted signals from a divided version of the VCO output clock by using a shift register. The shift register may be clocked by another clock signal at a higher frequency than the divided version of the VCO output clock. The phase differences between the plurality of phase shifted signals and a divided version of a reference clock may then be detected and converted to the analog control signals.

Abstract translation: 诸如无线通信信号的高频信号的合成包括具有可变电容压控振荡器（VCO）的锁相环（PLL）频率合成器，该可变电容压控振荡器（VCO）具有连续可变电容的离散可变电容。 离散可变电容可以提供可变电容的粗调谐调整，以补偿电容器和电感器公差，并将输出频率调整为接近期望的频率输出。 连续可变电容可以提供可变电容的微调调整，以将输出频率聚焦以精确地匹配期望的频率输出。 在微调调整期间，PLL可以由多个模拟控制信号控制。 可以通过使用移位寄存器首先从VCO输出时钟的分割版本生成多个相移信号来导出模拟控制信号。 移位寄存器可以以比VCO输出时钟的分频版本更高的频率由另一个时钟信号来计时。 然后可以检测多个相移信号和参考时钟的分割版本之间的相位差并转换成模拟控制信号。

公开(公告)号：US07884666B1

公开(公告)日：2011-02-08

申请号：US11169432

申请日：2005-06-29

Applicant: David R. Welland ,  Donald A. Kerth ,  Caiyi Wang

Inventor： David R. Welland ,  Donald A. Kerth ,  Caiyi Wang

IPC: H03K5/00

CPC classification number: H05K9/00 ,  H03L7/18 ,  H05K1/0216 ,  H05K3/10 ,  Y10T29/49124

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract translation: 提供一种减少电路干扰的方法和装置。 提供管理策略，以减少参考杂散和电路干扰。 管理策略使用一种或多种减少数字电流，最小化互感，利用场消除，防止泄漏电流和/或管理阻抗的技术的组合。 这些技术可以单独使用，或者优选地彼此组合使用。

公开(公告)号：US07835706B2

公开(公告)日：2010-11-16

申请号：US11224391

申请日：2005-09-12

Applicant: David R. Welland ,  Ramkishore Ganti ,  CaiYi Wang

Inventor： David R. Welland ,  Ramkishore Ganti ,  CaiYi Wang

IPC: H04B1/40

CPC classification number: H04B1/403

Abstract: An RF transmitter (104) includes a shared local oscillator circuit (126), transmit path circuitry (120, 122, 124), a divider (134), and a lowpass filter (322). The shared local oscillator circuit (126) generates a shared LO signal (116). The transmit path circuitry (120, 122, 124) mixes a baseband signal (107) and an IF mixing signal (116) to provide an IF signal (112), and converts the IF signal (112) to an RF transmit signal (105) at a desired frequency using an RF mixing signal received at a mixing input thereof. The divider (134) divides the shared LO signal (116) to provide an unfiltered RF mixing signal. The lowpass filter (322) has an input for receiving the unfiltered RF mixing signal, and an output coupled to the mixing input of the transmit path circuitry (120, 122, 124) for providing the RF mixing signal.

Abstract translation: RF发射机（104）包括共享本地振荡器电路（126），发射路径电路（120,122,124），分频器（134）和低通滤波器（322）。 共享本地振荡器电路（126）产生共享LO信号（116）。 发射路径电路（120,122,124）混合基带信号（107）和IF混合信号（116）以提供IF信号（112），并将IF信号（112）转换成RF发射信号（105 ），使用在其混合输入端接收的RF混频信号。 分频器（134）划分共享LO信号（116）以提供未滤波的RF混频信号。 低通滤波器（322）具有用于接收未滤波的RF混频信号的输入端和耦合到发射路径电路（120,122,124）的混频输入的输出，用于提供RF混频信号。

公开(公告)号：US20080272837A1

公开(公告)日：2008-11-06

申请号：US11930804

申请日：2007-10-31

Applicant: David R. Welland ,  Donald A. Kerth ,  Caiyi Wang

Inventor： David R. Welland ,  Donald A. Kerth ,  Caiyi Wang

IPC: H03K5/00

CPC classification number: H05K9/00 ,  H03L7/18 ,  H05K1/0216 ,  H05K3/10 ,  Y10T29/49124

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract translation: 提供一种减少电路干扰的方法和装置。 提供管理策略，以减少参考杂散和电路干扰。 管理策略使用一种或多种减少数字电流，最小化互感，利用场消除，防止泄漏电流和/或管理阻抗的技术的组合。 这些技术可以单独使用，或者优选地彼此组合使用。

公开(公告)号：US07376399B2

公开(公告)日：2008-05-20

申请号：US11096134

申请日：2005-03-31

Applicant: David R. Welland ,  Caiyi Wang

Inventor： David R. Welland ,  Caiyi Wang

IPC: H04B1/04 ,  H03C3/02 ,  H04B1/40

CPC classification number: H04B1/403

Abstract: Mixing circuitry for quadrature processing in communication systems and related methods are disclosed. The weighted mixing circuitry allows for arbitrary dividers to be utilized in generating the mixing signals for quadrature processing and thereby provides a significant advantage over prior architectures where 90 degree offset I and Q mixing signals were needed for quadrature mixing.

Abstract translation: 公开了用于通信系统中的正交处理的混合电路及相关方法。 加权混合电路允许任意的分频器用于生成用于正交处理的混合信号，并且因此提供了相对于其中需要90度偏移I和Q混合信号以进行正交混合的现有架构的显着优点。

公开(公告)号：US06993314B2

公开(公告)日：2006-01-31

申请号：US10074591

申请日：2002-02-13

Applicant: Lysander Lim ,  Caiyi Wang ,  David R. Welland ,  Donald A. Kerth ,  Richard T. Behrens ,  Jeffrey W. Scott ,  G. Diwakar Vishakhadatta ,  G. Tyson Tuttle ,  Vishnu S. Srinivasan

Inventor： Lysander Lim ,  Caiyi Wang ,  David R. Welland ,  Donald A. Kerth ,  Richard T. Behrens ,  Jeffrey W. Scott ,  G. Diwakar Vishakhadatta ,  G. Tyson Tuttle ,  Vishnu S. Srinivasan

IPC: H04N1/28

CPC classification number: H04B1/0003 ,  H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L7/099 ,  H03L7/187 ,  H03L7/199 ,  H03L7/23 ,  H04B1/28 ,  H04B1/406 ,  H04B15/02 ,  H04B15/04 ,  H04B2215/064

Abstract: A radio-frequency (RF) apparatus capable of transmitting RF signals includes transmitter path circuitry. The transmitter path circuitry includes a voltage-controlled oscillator (VCO) circuitry. The VCO circuitry generates a first signal that has a first frequency. A divider circuitry couples to the VCO circuitry and, in response to the first signal, the divider circuitry generates a second signal that has a second frequency. The frequency of the second signal equals the frequency of the first signal divided by a number.

公开(公告)号：US06574288B1

公开(公告)日：2003-06-03

申请号：US09087012

申请日：1998-05-29

Applicant: David R. Welland ,  Caiyi Wang

Inventor： David R. Welland ,  Caiyi Wang

IPC: H04B106

CPC classification number: H03L7/199 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/113

Abstract: A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other impurity requirements. In one embodiment, a phase-locked loop (PLL) frequency synthesizer is disclosed having a voltage controlled oscillator (VCO) with a variable capacitance that includes a discretely variable capacitance in conjunction with a continuously variable capacitance. The discretely variable capacitance may provide coarse tuning adjustment of the variable capacitance, and the continuously variable capacitance may provide a fine tuning adjustment of the variable capacitance. In a further detail, discrete control circuitry is disclosed that provides a digital control signal to a discretely variable capacitance circuit to control its overall capacitance and that adjusts the digital control signal depending upon feedback from the output frequency.

Abstract translation: 公开了一种用于合成高频信号的方法和装置，其克服了与现有实施相关的集成问题，同时满足苛刻的相位噪声和其他杂质要求。 在一个实施例中，公开了具有可变电容的压控振荡器（VCO）的锁相环（PLL）频率合成器，该可变电容包括连续可变电容的离散可变电容。 离散可变电容可以提供可变电容的粗调谐调节，并且连续可变电容可以提供可变电容的精细调谐。 更详细地，公开了离散控制电路，其向离散可变电容电路提供数字控制信号以控制其整体电容，并且根据来自输出频率的反馈来调整数字控制信号。