公开(公告)号：US07300827B2

公开(公告)日：2007-11-27

申请号：US11215140

申请日：2005-08-30

申请人： Hong-Sick Park ,  Shi-Yul Kim ,  Jong-Hyun Choung ,  Won-Suk Shin

发明人： Hong-Sick Park ,  Shi-Yul Kim ,  Jong-Hyun Choung ,  Won-Suk Shin

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/1288 ,  G02F1/134336 ,  G02F1/1362 ,  G02F1/1368 ,  G03F7/425 ,  H01L27/1214 ,  H01L27/124

摘要： A method of manufacturing a thin film transistor substrate includes forming a transistor thin layer pattern, forming a protecting layer, forming a photoresist film, forming a pixel electrode and a conductive layer that are separated from each other, stripping a photoresist pattern to remove the conductive layer using a stripping composition and dissolving the conductive layer. The method of manufacturing a thin film transistor substrate is capable of improving an efficiency of manufacturing process of the thin film transistor substrate. In addition, the stripping composition is recycled.

摘要翻译： 制造薄膜晶体管基板的方法包括形成晶体管薄层图案，形成保护层，形成光致抗蚀剂膜，形成彼此分离的像素电极和导电层，剥离光致抗蚀剂图案以除去导电 使用剥离组合物并溶解导电层。 制造薄膜晶体管基板的方法能够提高薄膜晶体管基板的制造工艺的效率。 此外，汽提组合物被再循环。

公开(公告)号：US08173494B2

公开(公告)日：2012-05-08

申请号：US12890324

申请日：2010-09-24

申请人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

发明人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

IPC分类号： H01L21/00

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/4908

摘要： A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

摘要翻译： 薄膜晶体管阵列及其制造方法包括由基板上的透明导电层形成的像素电极，由透明导电层形成的栅极线和基板上的不透明导电层，连接到栅极的栅电极 并且在基板上形成透明导电层和不透明导电层，覆盖栅极线和栅极的栅极绝缘层，形成在栅极绝缘层上以与栅电极重叠的半导体层，数据线， 与栅极线相交，连接到数据线的源电极与半导体层的一部分重叠，以及连接到像素电极以与半导体层的一部分重叠的漏电极。

公开(公告)号：US20080116474A1

公开(公告)日：2008-05-22

申请号：US11986330

申请日：2007-11-20

申请人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

发明人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

IPC分类号： H01L33/00 ,  H01L21/02

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/4908

摘要： A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

摘要翻译： 薄膜晶体管阵列及其制造方法包括由基板上的透明导电层形成的像素电极，由透明导电层形成的栅极线和基板上的不透明导电层，连接到栅极的栅电极 并且在基板上形成透明导电层和不透明导电层，覆盖栅极线和栅极的栅极绝缘层，形成在栅极绝缘层上以与栅电极重叠的半导体层，数据线， 与栅极线相交，连接到数据线的源电极与半导体层的一部分重叠，以及连接到像素电极以与半导体层的一部分重叠的漏电极。

公开(公告)号：US20110014737A1

公开(公告)日：2011-01-20

申请号：US12890324

申请日：2010-09-24

申请人： Jong-Hyun CHOUNG ,  Hong-Sick Park ,  Joo-Ae Youn ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

发明人： Jong-Hyun CHOUNG ,  Hong-Sick Park ,  Joo-Ae Youn ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

IPC分类号： H01L21/8234

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/4908

摘要： A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

摘要翻译： 薄膜晶体管阵列及其制造方法包括由基板上的透明导电层形成的像素电极，由透明导电层形成的栅极线和基板上的不透明导电层，连接到栅极的栅电极 并且在基板上形成透明导电层和不透明导电层，覆盖栅极线和栅极的栅极绝缘层，形成在栅极绝缘层上以与栅电极重叠的半导体层，数据线， 与栅极线相交，连接到数据线的源电极与半导体层的一部分重叠，以及连接到像素电极以与半导体层的一部分重叠的漏电极。

公开(公告)号：US20060269786A1

公开(公告)日：2006-11-30

申请号：US11437506

申请日：2006-05-18

申请人： Won-Suk Shin ,  Yang-Ho Bae ,  Hong-Sick Park

发明人： Won-Suk Shin ,  Yang-Ho Bae ,  Hong-Sick Park

IPC分类号： B32B19/00

CPC分类号： G02F1/136286 ,  G02F2001/136295 ,  H01L27/124 ,  H01L29/458 ,  H01L29/4908

摘要： A method of manufacturing a thin film transistor array panel, comprising forming a first signal line on a substrate, forming a gate insulating layer and a semiconductor layer on the first signal line in sequence, forming a second signal line on the gate insulating layer and the semiconductor layer, and forming a pixel electrode connected to the second signal layer. At least one of the first signal line and the second line comprise a first conductive oxide layer, a conductive layer containing silver (Ag), and a second conductive oxide layer formed at a lower temperature than that of the first conductive oxide layer.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括在基板上形成第一信号线，在第一信号线上依次形成栅绝缘层和半导体层，在栅绝缘层上形成第二信号线， 半导体层，并形成连接到第二信号层的像素电极。 第一信号线和第二线中的至少一个包括第一导电氧化物层，含有银（Ag）的导电层和在比第一导电氧化物层低的温度下形成的第二导电氧化物层。

公开(公告)号：US20060046365A1

公开(公告)日：2006-03-02

申请号：US11215140

申请日：2005-08-30

申请人： Hong-Sick Park ,  Shi-Yul Kim ,  Jong-Hyun Choung ,  Won-Suk Shin

发明人： Hong-Sick Park ,  Shi-Yul Kim ,  Jong-Hyun Choung ,  Won-Suk Shin

IPC分类号： H01L21/8234

CPC分类号： H01L27/1288 ,  G02F1/134336 ,  G02F1/1362 ,  G02F1/1368 ,  G03F7/425 ,  H01L27/1214 ,  H01L27/124

摘要： A method of manufacturing a thin film transistor substrate includes forming a transistor thin layer pattern, forming a protecting layer, forming a photoresist film, forming a pixel electrode and a conductive layer that are separated from each other, stripping a photoresist pattern to remove the conductive layer using a stripping composition and dissolving the conductive layer. The method of manufacturing a thin film transistor substrate is capable of improving an efficiency of manufacturing process of the thin film transistor substrate. In addition, the stripping composition is recycled.

公开(公告)号：US20100182525A1

公开(公告)日：2010-07-22

申请号：US12487928

申请日：2009-06-19

申请人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Doo-Hee Jung ,  Byeong-Jin Lee

发明人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Doo-Hee Jung ,  Byeong-Jin Lee

IPC分类号： G02F1/136 ,  H01L29/786

CPC分类号： H01L27/124 ,  G02F1/136286 ,  G02F2001/136231 ,  H01L27/1288

摘要： A display substrate includes an insulating substrate, a thin film transistor, a contact electrode, and a pixel electrode. The thin film transistor includes a control electrode, a semiconductor pattern, a first electrode, and a second electrode. The control electrode is on the insulating substrate. The semiconductor pattern is on the control electrode. The first electrode is on the semiconductor pattern. The second electrode is spaced apart from the first electrode on the semiconductor pattern. The contact electrode includes a contact portion and an undercut portion. The contact portion is electrically connected to the second electrode to partially expose the semiconductor pattern. The undercut portion is electrically connected to the contact portion to cover the semiconductor pattern. The pixel electrode is electrically connected to the second electrode through the contact portion of the contact electrode.

摘要翻译： 显示基板包括绝缘基板，薄膜晶体管，接触电极和像素电极。 薄膜晶体管包括控制电极，半导体图案，第一电极和第二电极。 控制电极在绝缘基板上。 半导体图案在控制电极上。 第一电极位于半导体图案上。 第二电极与半导体图案上的第一电极间隔开。 接触电极包括接触部分和底切部分。 接触部分电连接到第二电极以部分地暴露半导体图案。 底切部分电连接到接触部分以覆盖半导体图案。 像素电极通过接触电极的接触部分电连接到第二电极。

公开(公告)号：US20080169471A1

公开(公告)日：2008-07-17

申请号：US12008156

申请日：2008-01-08

申请人： Won-Suk Shin ,  Hong-Sick Park ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Byeong-Jin Lee

发明人： Won-Suk Shin ,  Hong-Sick Park ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Byeong-Jin Lee

IPC分类号： H01L29/04 ,  H01L21/84

CPC分类号： G02F1/13458 ,  G02F2001/136236 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

摘要： A display substrate includes a gate line, a data line, a pixel electrode and a source pad part. The gate line is formed on a base substrate. The data line crosses the gate line to define a pixel area. The pixel electrode makes contact with the base substrate. The source pad part is formed on an end portion of the data line, the source pad part including a source metal layer, a conductive etch stop layer formed on the source metal layer and a source pad electrode formed on the conductive etch stop layer. Thus, the conductive etch stop layer of the source pad part prevents the source metal layer of the source pad part from being damaged and the conductive etch stop layer of the source pad part may fully make contact with the source pad electrode.

摘要翻译： 显示基板包括栅极线，数据线，像素电极和源极焊盘部分。 栅极线形成在基底基板上。 数据线与栅极线交叉以定义像素区域。 像素电极与基底基板接触。 源极焊盘部分形成在数据线的端部，源焊盘部分包括源极金属层，形成在源极金属层上的导电蚀刻停止层和形成在导电蚀刻停止层上的源极焊盘电极。 因此，源极焊盘部分的导电蚀刻停止层防止源极焊盘部分的源极金属层被损坏，并且源极焊盘部分的导电蚀刻停止层可以完全与源极焊盘电极接触。

公开(公告)号：US20080067603A1

公开(公告)日：2008-03-20

申请号：US11696097

申请日：2007-04-03

申请人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Yoon ,  Jeong-Min Park ,  Doo-Hee Jung ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

发明人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Yoon ,  Jeong-Min Park ,  Doo-Hee Jung ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Byeong-Jin Lee

IPC分类号： H01L21/00 ,  H01L29/76

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： A method of manufacturing a thin film transistor array panel, including: forming gate lines on a substrate; forming a gate insulating layer on the gate lines; forming semiconductor layers on the gate insulating layer; forming data lines and drain electrodes on the semiconductor layers; depositing a passivation layer on the data lines and the drain electrodes; forming a first photoresist layer including a first portion and a second portion that is thinner than the first portion on the passivation layer; forming a first preliminary contact hole exposing the data lines by etching the passivation layer by using the first photoresist layer as a mask; removing the second portion of the first photoresist; forming a first contact hole by expanding the first preliminary contact hole and opening portions by etching the passivation layer by using the first portion of the first photoresist layer as a mask; depositing a conductor layer; and forming pixel electrodes in the opening portions and a first contact assistant member in the first contact hole by removing the first photoresist layer and the conductor layer located thereon.

摘要翻译： 一种制造薄膜晶体管阵列面板的方法，包括：在衬底上形成栅极线; 在栅极线上形成栅极绝缘层; 在所述栅极绝缘层上形成半导体层; 在半导体层上形成数据线和漏电极; 在数据线和漏电极上沉积钝化层; 形成第一光致抗蚀剂层，其包括比钝化层上的第一部分更薄的第一部分和第二部分; 通过使用第一光致抗蚀剂层作为掩模，形成通过蚀刻钝化层而暴露数据线的第一预接触孔; 去除第一光致抗蚀剂的第二部分; 通过使用第一光致抗蚀剂层的第一部分作为掩模，通过蚀刻钝化层来扩展第一预接触孔和开口部来形成第一接触孔; 沉积导体层; 以及通过去除位于其上的第一光致抗蚀剂层和导体层，在开口部分中形成像素电极和第一接触孔中的第一接触辅助部件。

公开(公告)号：US08093594B2

公开(公告)日：2012-01-10

申请号：US12487928

申请日：2009-06-19

申请人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Doo-Hee Jung ,  Byeong-Jin Lee

发明人： Jong-Hyun Choung ,  Hong-Sick Park ,  Joo-Ae Youn ,  Sun-Young Hong ,  Bong-Kyun Kim ,  Won-Suk Shin ,  Doo-Hee Jung ,  Byeong-Jin Lee

IPC分类号： H01L27/14

CPC分类号： H01L27/124 ,  G02F1/136286 ,  G02F2001/136231 ,  H01L27/1288

摘要： A display substrate includes an insulating substrate, a thin film transistor, a contact electrode, and a pixel electrode. The thin film transistor includes a control electrode, a semiconductor pattern, a first electrode, and a second electrode. The control electrode is on the insulating substrate. The semiconductor pattern is on the control electrode. The first electrode is on the semiconductor pattern. The second electrode is spaced apart from the first electrode on the semiconductor pattern. The contact electrode includes a contact portion and an undercut portion. The contact portion is electrically connected to the second electrode to partially expose the semiconductor pattern. The undercut portion is electrically connected to the contact portion to cover the semiconductor pattern. The pixel electrode is electrically connected to the second electrode through the contact portion of the contact electrode.

摘要翻译： 显示基板包括绝缘基板，薄膜晶体管，接触电极和像素电极。 薄膜晶体管包括控制电极，半导体图案，第一电极和第二电极。 控制电极在绝缘基板上。 半导体图案在控制电极上。 第一电极位于半导体图案上。 第二电极与半导体图案上的第一电极间隔开。 接触电极包括接触部分和底切部分。 接触部分电连接到第二电极以部分地暴露半导体图案。 底切部分电连接到接触部分以覆盖半导体图案。 像素电极通过接触电极的接触部分电连接到第二电极。